From e8f03925cc307427dfda0f2f250980fcd3e2d6cf Mon Sep 17 00:00:00 2001 From: Chih-Min Chao Date: Mon, 22 Feb 2021 19:22:09 -0800 Subject: rvv: add vsetivli Signed-off-by: Chih-Min Chao --- opcodes-rvv | 7 ++++--- parse_opcodes | 1 + 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/opcodes-rvv b/opcodes-rvv index f23f590..808e6b1 100644 --- a/opcodes-rvv +++ b/opcodes-rvv @@ -4,12 +4,13 @@ # is given by specifying one or more range/value pairs: # hi..lo=value or bit=value or arg=value (e.g. 6..2=0x45 10=1 rd=0) # -# is one of vd, vs3, vs1, vs2, vm, nf, wd, simm5, zimm11 +# is one of vd, vs3, vs1, vs2, vm, nf, wd, simm5, zimm10, zimm11 # configuration setting # https://github.com/riscv/riscv-v-spec/blob/master/vcfg-format.adoc -vsetvli 31=0 zimm11 rs1 14..12=0x7 rd 6..0=0x57 -vsetvl 31=1 30..25=0x0 rs2 rs1 14..12=0x7 rd 6..0=0x57 +vsetivli 31=1 30=1 zimm10 zimm 14..12=0x7 rd 6..0=0x57 +vsetvli 31=0 zimm11 rs1 14..12=0x7 rd 6..0=0x57 +vsetvl 31=1 30..25=0x0 rs2 rs1 14..12=0x7 rd 6..0=0x57 # # Vector Loads and Store diff --git a/parse_opcodes b/parse_opcodes index 1118e18..6f4ccec 100755 --- a/parse_opcodes +++ b/parse_opcodes @@ -46,6 +46,7 @@ arglut['wd'] = (26,26) arglut['amoop'] = (31,27) arglut['nf'] = (31,29) arglut['simm5'] = (19,15) +arglut['zimm10'] = (29,20) arglut['zimm11'] = (30,20) -- cgit v1.1