From 0254119b270909cbafdd7d838c989340e166a2c5 Mon Sep 17 00:00:00 2001
From: Colin Schmidt <colins@eecs.berkeley.edu>
Date: Sun, 4 Nov 2018 11:24:57 -0800
Subject: Add vsetvl to table and encoding

---
 Makefile      | 2 +-
 opcodes-v     | 5 +++--
 parse-opcodes | 2 +-
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/Makefile b/Makefile
index 4a54dcd..300d026 100644
--- a/Makefile
+++ b/Makefile
@@ -12,7 +12,7 @@ install: $(ISASIM_H) $(PK_H) $(FESVR_H) $(ENV_H) $(OPENOCD_H) inst.chisel instr-
 
 $(ISASIM_H) $(PK_H) $(FESVR_H) $(ENV_H) $(OPENOCD_H): $(ALL_OPCODES) parse-opcodes encoding.h
 	cp encoding.h $@
-	cat opcodes opcodes-rvc-pseudo opcodes-rvc opcodes-custom | ./parse-opcodes -c >> $@
+	cat opcodes opcodes-rvc-pseudo opcodes-rvc opcodes-custom opcodes-v | ./parse-opcodes -c >> $@
 
 inst.chisel: $(ALL_OPCODES) parse-opcodes
 	cat opcodes opcodes-custom opcodes-pseudo | ./parse-opcodes -chisel > $@
diff --git a/opcodes-v b/opcodes-v
index 400f0af..8ec5e5d 100644
--- a/opcodes-v
+++ b/opcodes-v
@@ -186,8 +186,9 @@ vsgeu     m vd vs1 vs2 27..25=7 31..28=13 14=1 6..0=0x57
 
 # group 31..28=14
 
-# group 31..28=15
-vconfig   m vd vs1 vimm         31..28=15 14=1 6..0=0x57
+# group 31..28=15 are unmasked
+vsetvl    vd vs1 24..20=0 27..25=0 31..28=15 14=1 13..12=0 6..0=0x57
+vconfig   vd vs1 vimm              31..28=15 14=1 13..12=1 6..0=0x57
 
 # 14=0 is for fp
 # 31..27 is opcode
diff --git a/parse-opcodes b/parse-opcodes
index d664580..9e61da5 100755
--- a/parse-opcodes
+++ b/parse-opcodes
@@ -959,7 +959,7 @@ def make_vector_adoc_table():
   print_vec_insts('vdiv', 'vdivu', 'vrem', 'vremu', 'vmul', 'vmulh', 'vmulhu', 'vmulhsu')
   print_vec_insts('vpopc', 'vredsum', 'vredmax', 'vredmin')
   print_vec_insts('vaddi', 'vsli', 'vsrli', 'vsrai', 'vclipi', 'vandi', 'vori', 'vxori')
-  print_vec_insts('vconfig')
+  print_vec_insts('vsetvl', 'vconfig')
   print_vec_footer()
   print_vec_header()
   print_vec_insts('vfmadd.s', 'vfmsub.s')
-- 
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