Age | Commit message (Expand) | Author | Files | Lines |
2011-04-24 | [xcc,sim,opcodes] added more RVC instructions | Andrew Waterman | 3 | -5/+47 |
2011-04-18 | [xcc,sim,opcodes] added rvc conditional branches | Andrew Waterman | 2 | -12/+16 |
2011-04-12 | [xcc,pk,sim] added privileged cflush instruction | Andrew Waterman | 2 | -0/+2 |
2011-04-12 | [xcc,sim] rvc loads and stores | Andrew Waterman | 3 | -4/+24 |
2011-04-11 | [xcc,sim,opcodes] more rvc instructions and bug fixes | Andrew Waterman | 3 | -3/+10 |
2011-04-09 | [xcc, sim] added rvc insn c.li; misc fixes | Andrew Waterman | 3 | -2/+8 |
2011-04-09 | [xcc,pk,sim,opcodes] added first RVC instruction | Andrew Waterman | 3 | -12/+16 |
2011-04-07 | [pk,sim] fixed parse-opcodes bug | Andrew Waterman | 1 | -2/+2 |
2011-04-06 | [opcodes,pk,sim,xcc] fix utidx - add rd | Yunsup Lee | 3 | -4/+4 |
2011-04-05 | [opcodes,pk,sim,xcc] fix vector mem instruction format, add vector seg mem in... | Yunsup Lee | 3 | -92/+199 |
2011-04-04 | [opcodes,pk,sim,xcc] add leftover vector instructions (vf, etc.) | Yunsup Lee | 3 | -0/+12 |
2011-04-04 | [opcodes,pk,sim,xcc] add vector mem instructions | Yunsup Lee | 3 | -0/+70 |
2011-04-04 | [opcodes,pk,sim,xcc] add stop,utidx instructions | Yunsup Lee | 3 | -0/+24 |
2011-04-04 | [opcodes,pk,sim,xcc] add fence instructions for vector unit | Yunsup Lee | 3 | -2/+46 |
2011-03-25 | [opcodes] fixed up instruction table | Andrew Waterman | 2 | -1475/+1474 |
2011-03-25 | [opcodes] minor opcode changes | Andrew Waterman | 2 | -58/+58 |
2011-03-25 | [sim,pk,xcc,opcodes] removed fminmag/fmaxmag | Andrew Waterman | 2 | -8/+0 |
2011-03-25 | [xcc,pk,opcodes,sim] updated encoding/insn names | Andrew Waterman | 4 | -78/+181 |
2011-02-15 | [xcc,opcodes,pk,sim] krste's re-renaming spree | Andrew Waterman | 3 | -158/+124 |
2011-02-15 | [xcc,sim,opcodes] removed mtflh/mffl/mffh | Andrew Waterman | 3 | -60/+0 |
2011-02-02 | [sim,xcc,opcodes] added back mtflh.d | Andrew Waterman | 3 | -6/+26 |
2011-02-02 | [opcodes,pk,sim,xcc] synci now bombs whole icache | Andrew Waterman | 3 | -11/+11 |
2011-02-01 | [xcc,opcodes,pk,sim] cleanup to FP ISA | Andrew Waterman | 3 | -84/+64 |
2011-01-31 | [opcodes] fixed verilog generation for shifts | Andrew Waterman | 2 | -9/+9 |
2011-01-25 | [sim,opcodes] add mulhsu instruction | Andrew Waterman | 3 | -2/+13 |
2011-01-25 | [opcodes,pk,sim,xcc] great renumbering of 2011, part deux | Andrew Waterman | 4 | -410/+402 |
2011-01-20 | [sim, pk, xcc, opcodes] great instruction renaming of 2011 | Andrew Waterman | 4 | -745/+271 |
2011-01-18 | [opcodes, sim, xcc] made *w insns illegal in RV32 | Andrew Waterman | 3 | -22/+0 |
2011-01-17 | [opcodes, pk, sim, xcc] removed nor, normalized macros to addi | Andrew Waterman | 3 | -11/+0 |
2011-01-03 | [opcodes,pk,sim,xcc] flip fields to favor little endian | Yunsup Lee | 4 | -949/+1508 |
2010-11-21 | [opcodes, pk, sim, xcc] Tweaked FP encoding | Andrew Waterman | 4 | -1001/+682 |
2010-11-21 | [opcodes] generate latex and verilog correctly | Andrew Waterman | 4 | -1165/+1282 |
2010-11-21 | [xcc, sim, pk, opcodes] new instruction encoding! | Andrew Waterman | 4 | -889/+812 |
2010-11-21 | [opcodes, pk, sim, xcc] made jumps shorter and PC-relative | Andrew Waterman | 4 | -18/+12 |
2010-10-31 | [opcodes] add latex table for rm stuff | Yunsup Lee | 3 | -560/+1111 |
2010-10-26 | [opcodes] remove .swp file | Yunsup Lee | 1 | -0/+0 |
2010-10-25 | [sim,xcc,pk,opcodes] static rounding modes for FP insns | Andrew Waterman | 5 | -127/+152 |
2010-10-20 | [opcodes] changed formatting of optab section headers | Andrew Waterman | 2 | -12/+12 |
2010-10-15 | [pk, sim] added FPU emulation support to proxy kernel | Andrew Waterman | 3 | -2/+3 |
2010-10-07 | [xcc] modified opcodes for better FP decode mapping | Andrew Waterman | 3 | -21/+21 |
2010-10-05 | [opcodes] added code field back to syscall/break | Andrew Waterman | 2 | -4/+4 |
2010-10-05 | [opcodes] updated parse-opcodes for latex tables | Yunsup Lee | 3 | -278/+378 |
2010-10-05 | [opcodes] update parse-opcodes | Yunsup Lee | 3 | -329/+311 |
2010-10-02 | [xcc, sim] mff now uses rs2 for data | Andrew Waterman | 3 | -111/+111 |
2010-09-28 | [opcodes, sim, xcc] added mffl.d instruction | Andrew Waterman | 3 | -392/+386 |
2010-09-20 | [xcc, sim] changed instruction format so imm12 subs for rs2 | Andrew Waterman | 4 | -660/+658 |
2010-09-13 | [xcc, sim] replaced ble/bleu with bge/bgeu | Andrew Waterman | 3 | -15/+15 |
2010-09-12 | [opcodes] fixed tex table for ish,ishw types | Yunsup Lee | 3 | -143/+130 |
2010-09-12 | [opcodes] change rsh to ish types | Yunsup Lee | 1 | -9/+9 |
2010-09-12 | [opcodes] fixed verilog generation for ish,ishw types | Yunsup Lee | 2 | -14/+14 |