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-rw-r--r--inst.v2
-rw-r--r--instr-table.tex4
-rw-r--r--opcodes2
3 files changed, 4 insertions, 4 deletions
diff --git a/inst.v b/inst.v
index 01ccfec..f25f019 100644
--- a/inst.v
+++ b/inst.v
@@ -89,7 +89,7 @@
`define SYSCALL 32'b00000_00000_00000_0000000000_1110111
`define BREAK 32'b00000_00000_00000_0000000001_1110111
`define STOP 32'b00000_00000_00000_0000000010_1110111
-`define UTIDX 32'b00000_00000_00000_0000000011_1110111
+`define UTIDX 32'b?????_00000_00000_0000000011_1110111
`define EI 32'b?????_00000_00000_0000000000_1111011
`define DI 32'b?????_00000_00000_0000000001_1111011
`define MFPCR 32'b?????_00000_?????_0000000010_1111011
diff --git a/instr-table.tex b/instr-table.tex
index 4b3ec7e..a248e85 100644
--- a/instr-table.tex
+++ b/instr-table.tex
@@ -2031,12 +2031,12 @@
&
-\multicolumn{1}{|c|}{00000} &
+\multicolumn{1}{|c|}{rd} &
\multicolumn{1}{c|}{00000} &
\multicolumn{1}{c|}{00000} &
\multicolumn{4}{c|}{0000000} &
\multicolumn{2}{c|}{011} &
-\multicolumn{1}{c|}{1110111} & UTIDX \\
+\multicolumn{1}{c|}{1110111} & UTIDX rd \\
\cline{2-11}
diff --git a/opcodes b/opcodes
index e062d1a..1ca81f4 100644
--- a/opcodes
+++ b/opcodes
@@ -120,7 +120,7 @@ break 31..27=0 26..22=0 21..17=0 16..7=1 6..2=0x1D 1..0=3
# vector scalar instructions
stop 31..27=0 26..22=0 21..17=0 16..7=2 6..2=0x1D 1..0=3
-utidx 31..27=0 26..22=0 21..17=0 16..7=3 6..2=0x1D 1..0=3
+utidx rd 26..22=0 21..17=0 16..7=3 6..2=0x1D 1..0=3
ei rd 26..22=0 21..17=0 16..7=0 6..2=0x1E 1..0=3
di rd 26..22=0 21..17=0 16..7=1 6..2=0x1E 1..0=3