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| author | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2010-07-18 18:28:05 -0700 |
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| committer | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2010-07-18 18:28:05 -0700 |
| commit | 491e8f77c1e8fb1d2dce0df5e7f12000ce1da859 (patch) | |
| tree | 798c1e7bab3f0fbdd2c5731956cc61242e9fd2a7 /update-opcodes | |
| download | riscv-opcodes-491e8f77c1e8fb1d2dce0df5e7f12000ce1da859.zip riscv-opcodes-491e8f77c1e8fb1d2dce0df5e7f12000ce1da859.tar.gz riscv-opcodes-491e8f77c1e8fb1d2dce0df5e7f12000ce1da859.tar.bz2 | |
Reorganized directory structure
Moved cross-compiler to /xcc/ rather than /
Added ISA sim in /sim/
Added Proxy Kernel in /pk/ (to be cleaned up)
Added opcode map to /opcodes/ (ditto)
Added documentation to /doc/
Diffstat (limited to 'update-opcodes')
| -rwxr-xr-x | update-opcodes | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/update-opcodes b/update-opcodes new file mode 100755 index 0000000..a546d05 --- /dev/null +++ b/update-opcodes @@ -0,0 +1,4 @@ +#!/bin/bash +./parse-opcodes -tex < opcodes > ../doc/opcodes.tex +./parse-opcodes -disasm < opcodes > ../xcc/src/include/opcode/mips-riscv-opc.h +./parse-opcodes -switch < opcodes > ../sim/riscv/execute.h |