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| author | Andrew Waterman <andrew@sifive.com> | 2019-06-18 14:44:10 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-06-18 14:44:35 -0700 |
| commit | 255dd3163e288aa44ee6f0dd71a01facf3300d32 (patch) | |
| tree | a1427072acef9b87082d242ceca7d3ed21cf0c8d /parse-opcodes | |
| parent | b10e9afcfeacbe34f476ea72281b0bf0938504fe (diff) | |
| download | riscv-opcodes-255dd3163e288aa44ee6f0dd71a01facf3300d32.zip riscv-opcodes-255dd3163e288aa44ee6f0dd71a01facf3300d32.tar.gz riscv-opcodes-255dd3163e288aa44ee6f0dd71a01facf3300d32.tar.bz2 | |
Add pseudos for RV32 shifts with correct immediate constraint
Diffstat (limited to 'parse-opcodes')
0 files changed, 0 insertions, 0 deletions