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| author | Andrew Waterman <andrew@sifive.com> | 2017-02-20 21:50:40 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-02-20 21:50:40 -0800 |
| commit | ee4249cf363837a8b5551aa6671a901a39786d2f (patch) | |
| tree | 8b02fa2951cf0ff588b8df8ed26bd4c29ffeb685 /opcodes | |
| parent | 689c591e0e7218732af884f0fac97e8ca2605cf8 (diff) | |
| download | riscv-opcodes-ee4249cf363837a8b5551aa6671a901a39786d2f.zip riscv-opcodes-ee4249cf363837a8b5551aa6671a901a39786d2f.tar.gz riscv-opcodes-ee4249cf363837a8b5551aa6671a901a39786d2f.tar.bz2 | |
Remove sfence.vm and add sfence.vma
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -120,7 +120,7 @@ sret 11..7=0 19..15=0 31..20=0x102 14..12=0 6..2=0x1C 1..0=3 hret 11..7=0 19..15=0 31..20=0x202 14..12=0 6..2=0x1C 1..0=3 mret 11..7=0 19..15=0 31..20=0x302 14..12=0 6..2=0x1C 1..0=3 dret 11..7=0 19..15=0 31..20=0x7b2 14..12=0 6..2=0x1C 1..0=3 -sfence.vm 11..7=0 rs1 31..20=0x104 14..12=0 6..2=0x1C 1..0=3 +sfence.vma 11..7=0 rs1 rs2 31..25=0x09 14..12=0 6..2=0x1C 1..0=3 wfi 11..7=0 19..15=0 31..20=0x105 14..12=0 6..2=0x1C 1..0=3 csrrw rd rs1 imm12 14..12=1 6..2=0x1C 1..0=3 csrrs rd rs1 imm12 14..12=2 6..2=0x1C 1..0=3 |