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| author | Andrew Waterman <andrew@sifive.com> | 2018-01-26 18:45:06 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2018-02-07 23:05:03 -0800 |
| commit | 19d6c637d1aeffd59dc08499d515061659cba1ad (patch) | |
| tree | 47430c7b55b10ae82884719e8995e230978b1c70 /opcodes-v | |
| parent | 25881d8a221393cfd996ec074d8003ef31bfc5a6 (diff) | |
| download | riscv-opcodes-19d6c637d1aeffd59dc08499d515061659cba1ad.zip riscv-opcodes-19d6c637d1aeffd59dc08499d515061659cba1ad.tar.gz riscv-opcodes-19d6c637d1aeffd59dc08499d515061659cba1ad.tar.bz2 | |
V extension WIP
Diffstat (limited to 'opcodes-v')
| -rw-r--r-- | opcodes-v | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/opcodes-v b/opcodes-v new file mode 100644 index 0000000..60089aa --- /dev/null +++ b/opcodes-v @@ -0,0 +1,81 @@ +# Vector loads & stores +vld m vd rs1 24..20=0 vlimm 26..25=0 14=1 6..0=0x07 +vlds m vd rs1 rs2 vlimm 26..25=1 14=1 6..0=0x07 +vldx m vd rs1 vs2 vlimm 26..25=2 14=1 6..0=0x07 +vst m vs3 rs1 24..20=0 vsimm 26..25=0 14=1 6..0=0x27 +vsts m vs3 rs1 rs2 vsimm 26..25=1 14=1 6..0=0x27 +vstx m vs3 rs1 vs2 vsimm 26..25=2 14=1 6..0=0x27 + +# Vector AMOs +vamoswap m vd vs3 vs2 19..15=0x01 26..25=3 14=1 6..0=0x27 +vamoadd m vd vs3 vs2 19..15=0x00 26..25=3 14=1 6..0=0x27 +vamoxor m vd vs3 vs2 19..15=0x04 26..25=3 14=1 6..0=0x27 +vamoor m vd vs3 vs2 19..15=0x08 26..25=3 14=1 6..0=0x27 +vamoand m vd vs3 vs2 19..15=0x0C 26..25=3 14=1 6..0=0x27 +vamomin m vd vs3 vs2 19..15=0x10 26..25=3 14=1 6..0=0x27 +vamomax m vd vs3 vs2 19..15=0x14 26..25=3 14=1 6..0=0x27 + +# Vector FMA +@vmadd m vd vs1 vs2 vs3 26..25=0 14=0 6..0=0x67 +@vmsub m vd vs1 vs2 vs3 26..25=1 14=0 6..0=0x67 +@vnmsub m vd vs1 vs2 vs3 26..25=2 14=0 6..0=0x67 +@vnmadd m vd vs1 vs2 vs3 26..25=3 14=0 6..0=0x67 + +# Vector arithmetic. +# First, all the immediates. +vaddi m vd vs1 vimm 31..28=0 14=1 6..0=0x67 +vsli m vd vs1 vimm 31..28=1 14=1 6..0=0x67 +vcvti m vd vs1 vimm 31..28=2 14=1 6..0=0x67 +vclipi m vd vs1 vimm 31..28=3 14=1 6..0=0x67 +vxori m vd vs1 vimm 31..28=4 14=1 6..0=0x67 +vsri m vd vs1 vimm 31..28=5 14=1 6..0=0x67 +vori m vd vs1 vimm 31..28=6 14=1 6..0=0x67 +vandi m vd vs1 vimm 31..28=7 14=1 6..0=0x67 + +# group 31..28=8 +vadd m vd vs1 vs2 27..25=0 31..28=8 14=1 6..0=0x67 +vsub m vd vs1 vs2 27..25=1 31..28=8 14=1 6..0=0x67 +vmin m vd vs1 vs2 27..25=2 31..28=8 14=1 6..0=0x67 +vmax m vd vs1 vs2 27..25=3 31..28=8 14=1 6..0=0x67 +vdiv m vd vs1 vs2 27..25=4 31..28=8 14=1 6..0=0x67 +vrem m vd vs1 vs2 27..25=5 31..28=8 14=1 6..0=0x67 +vmul m vd vs1 vs2 27..25=6 31..28=8 14=1 6..0=0x67 +vmulh m vd vs1 vs2 27..25=7 31..28=8 14=1 6..0=0x67 + +# group 31..28=9 +vsl m vd vs1 vs2 27..25=0 31..28=9 14=1 6..0=0x67 +vsgnjx m vd vs1 vs2 27..25=1 31..28=9 14=1 6..0=0x67 +vsgnj m vd vs1 vs2 27..25=2 31..28=9 14=1 6..0=0x67 +vsgnjn m vd vs1 vs2 27..25=3 31..28=9 14=1 6..0=0x67 +vseq m vd vs1 vs2 27..25=4 31..28=9 14=1 6..0=0x67 +vsne m vd vs1 vs2 27..25=5 31..28=9 14=1 6..0=0x67 +vslt m vd vs1 vs2 27..25=6 31..28=9 14=1 6..0=0x67 +vsge m vd vs1 vs2 27..25=7 31..28=9 14=1 6..0=0x67 + +# group 31..28=10 includes instructions that write xd +# (and may also read xs1 and/or xs2). +vextract m rd vs1 rs2 27..25=1 31..28=10 14=1 6..0=0x67 + +# group 31..28=11 includes instructions that read xs1 and/or xs2, +# but do not write xd. +vclip m vd vs1 rs2 27..25=0 31..28=11 14=1 6..0=0x67 +vinsert m vd rs1 rs2 27..25=1 31..28=11 14=1 6..0=0x67 +vslide m vd rs1 rs2 27..25=2 31..28=11 14=1 6..0=0x67 + +# group 31..28=12 +vxor m vd vs1 vs2 27..25=0 31..28=12 14=1 6..0=0x67 +vmerge m vd vs1 vs2 27..25=1 31..28=12 14=1 6..0=0x67 +vselect m vd vs1 vs2 27..25=2 31..28=12 14=1 6..0=0x67 +# group 31..28=12, 27..25=7 is for single-argument instructions. +vclass m vd vs1 27..25=7 31..28=12 14=1 6..0=0x67 24..20=0 +vpopc m vd vs1 27..25=7 31..28=12 14=1 6..0=0x67 24..20=1 +vsqrt m vd vs1 27..25=7 31..28=12 14=1 6..0=0x67 24..20=2 + +# group 31..28=13 +vsr m vd vs1 vs2 27..25=0 31..28=13 14=1 6..0=0x67 + +# group 31..28=14 +vor m vd vs1 vs2 27..25=0 31..28=14 14=1 6..0=0x67 + +# group 31..28=15 +vand m vd vs1 vs2 27..25=0 31..28=15 14=1 6..0=0x67 |