diff options
author | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2011-03-25 16:43:38 -0700 |
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committer | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2011-03-25 16:43:38 -0700 |
commit | 3464ec5a9a1393e7e902eed06c5ff1c5970a1be6 (patch) | |
tree | 99860893ce09f1c02b53398f366cc93e0d170839 | |
parent | 24e45b3da7e036d12f972cccbafe1098ff270ae0 (diff) | |
download | riscv-opcodes-3464ec5a9a1393e7e902eed06c5ff1c5970a1be6.zip riscv-opcodes-3464ec5a9a1393e7e902eed06c5ff1c5970a1be6.tar.gz riscv-opcodes-3464ec5a9a1393e7e902eed06c5ff1c5970a1be6.tar.bz2 |
[xcc,pk,opcodes,sim] updated encoding/insn names
-rw-r--r-- | inst.v | 67 | ||||
-rw-r--r-- | instr-table.tex | 107 | ||||
-rw-r--r-- | opcodes | 80 | ||||
-rwxr-xr-x | parse-opcodes | 5 |
4 files changed, 181 insertions, 78 deletions
@@ -4,6 +4,7 @@ `define JALR_C 32'b?????_?????_????????????_000_1101011 `define JALR_R 32'b?????_?????_????????????_001_1101011 `define JALR_J 32'b?????_?????_????????????_010_1101011 +`define RDNPC 32'b?????_00000_000000000000_100_1101011 `define BEQ 32'b?????_?????_?????_???????_000_1100011 `define BNE 32'b?????_?????_?????_???????_001_1100011 `define BLT 32'b?????_?????_?????_???????_100_1100011 @@ -79,31 +80,31 @@ `define AMOMAX_D 32'b?????_?????_?????_00001_010_11_1000011 `define AMOMINU_D 32'b?????_?????_?????_00001_100_11_1000011 `define AMOMAXU_D 32'b?????_?????_?????_00001_110_11_1000011 -`define RDNPC 32'b?????_00000_00000_0000000000_0010111 -`define SYNCI 32'b00000_00000_00000_0000000001_0010111 -`define SYNC 32'b00000_00000_00000_0000000010_0010111 -`define SYSCALL 32'b00000_00000_????????????_011_0010111 -`define EI 32'b?????_00000_00000_0000000000_1111111 -`define DI 32'b?????_00000_00000_0000001000_1111111 -`define MFPCR 32'b?????_00000_?????_0000000001_1111111 -`define MTPCR 32'b00000_?????_?????_0000001001_1111111 -`define ERET 32'b00000_00000_00000_0000000010_1111111 +`define FENCE_I 32'b?????_?????_????????????_001_0101111 +`define FENCE 32'b?????_?????_????????????_010_0101111 +`define SYSCALL 32'b00000_00000_00000_0000000000_1110111 +`define BREAK 32'b00000_00000_00000_0000000001_1110111 +`define EI 32'b?????_00000_00000_0000000000_1111011 +`define DI 32'b?????_00000_00000_0000000001_1111011 +`define MFPCR 32'b?????_00000_?????_0000000010_1111011 +`define MTPCR 32'b00000_?????_?????_0000000011_1111011 +`define ERET 32'b00000_00000_00000_0000000100_1111011 `define FADD_S 32'b?????_?????_?????_00000_???_00_1010011 `define FSUB_S 32'b?????_?????_?????_00001_???_00_1010011 `define FMUL_S 32'b?????_?????_?????_00010_???_00_1010011 `define FDIV_S 32'b?????_?????_?????_00011_???_00_1010011 `define FSQRT_S 32'b?????_?????_00000_00100_???_00_1010011 -`define FSGNJ_S 32'b?????_?????_?????_0010111100_1010011 -`define FSGNJN_S 32'b?????_?????_?????_0011011100_1010011 -`define FSGNJX_S 32'b?????_?????_?????_0011111100_1010011 +`define FSGNJ_S 32'b?????_?????_?????_0010100000_1010011 +`define FSGNJN_S 32'b?????_?????_?????_0011000000_1010011 +`define FSGNJX_S 32'b?????_?????_?????_0011100000_1010011 `define FADD_D 32'b?????_?????_?????_00000_???_01_1010011 `define FSUB_D 32'b?????_?????_?????_00001_???_01_1010011 `define FMUL_D 32'b?????_?????_?????_00010_???_01_1010011 `define FDIV_D 32'b?????_?????_?????_00011_???_01_1010011 `define FSQRT_D 32'b?????_?????_00000_00100_???_01_1010011 -`define FSGNJ_D 32'b?????_?????_?????_0010111101_1010011 -`define FSGNJN_D 32'b?????_?????_?????_0011011101_1010011 -`define FSGNJX_D 32'b?????_?????_?????_0011111101_1010011 +`define FSGNJ_D 32'b?????_?????_?????_0010100001_1010011 +`define FSGNJN_D 32'b?????_?????_?????_0011000001_1010011 +`define FSGNJX_D 32'b?????_?????_?????_0011100001_1010011 `define FCVT_L_S 32'b?????_?????_00000_01000_???_00_1010011 `define FCVT_LU_S 32'b?????_?????_00000_01001_???_00_1010011 `define FCVT_W_S 32'b?????_?????_00000_01010_???_00_1010011 @@ -118,22 +119,30 @@ `define FCVT_S_WU 32'b?????_?????_00000_01111_???_00_1010011 `define FCVT_D_L 32'b?????_?????_00000_01100_???_01_1010011 `define FCVT_D_LU 32'b?????_?????_00000_01101_???_01_1010011 -`define FCVT_D_W 32'b?????_?????_00000_0111011101_1010011 -`define FCVT_D_WU 32'b?????_?????_00000_0111111101_1010011 +`define FCVT_D_W 32'b?????_?????_00000_0111000001_1010011 +`define FCVT_D_WU 32'b?????_?????_00000_0111100001_1010011 `define FCVT_S_D 32'b?????_?????_00000_10001_???_00_1010011 `define FCVT_D_S 32'b?????_?????_00000_10000_???_01_1010011 -`define FEQ_S 32'b?????_?????_?????_1010111100_1010011 -`define FLT_S 32'b?????_?????_?????_1011011100_1010011 -`define FLE_S 32'b?????_?????_?????_1011111100_1010011 -`define FEQ_D 32'b?????_?????_?????_1010111101_1010011 -`define FLT_D 32'b?????_?????_?????_1011011101_1010011 -`define FLE_D 32'b?????_?????_?????_1011111101_1010011 -`define MFTX_S 32'b?????_00000_?????_1100011100_1010011 -`define MFTX_D 32'b?????_00000_?????_1100011101_1010011 -`define MFFSR 32'b?????_00000_00000_1101111100_1010011 -`define MXTF_S 32'b?????_?????_00000_1110011100_1010011 -`define MXTF_D 32'b?????_?????_00000_1110011101_1010011 -`define MTFSR 32'b00000_?????_00000_1110111100_1010011 +`define FEQ_S 32'b?????_?????_?????_1010100000_1010011 +`define FLT_S 32'b?????_?????_?????_1011000000_1010011 +`define FLE_S 32'b?????_?????_?????_1011100000_1010011 +`define FEQ_D 32'b?????_?????_?????_1010100001_1010011 +`define FLT_D 32'b?????_?????_?????_1011000001_1010011 +`define FLE_D 32'b?????_?????_?????_1011100001_1010011 +`define FMIN_S 32'b?????_?????_?????_1100000000_1010011 +`define FMAX_S 32'b?????_?????_?????_1100100000_1010011 +`define FMINMAG_S 32'b?????_?????_?????_1101000000_1010011 +`define FMAXMAG_S 32'b?????_?????_?????_1101100000_1010011 +`define FMIN_D 32'b?????_?????_?????_1100000001_1010011 +`define FMAX_D 32'b?????_?????_?????_1100100001_1010011 +`define FMINMAG_D 32'b?????_?????_?????_1101000001_1010011 +`define FMAXMAG_D 32'b?????_?????_?????_1101100001_1010011 +`define MFTX_S 32'b?????_00000_?????_1110000000_1010011 +`define MFTX_D 32'b?????_00000_?????_1110000001_1010011 +`define MFFSR 32'b?????_00000_00000_1110100000_1010011 +`define MXTF_S 32'b?????_?????_00000_1111000000_1010011 +`define MXTF_D 32'b?????_?????_00000_1111000001_1010011 +`define MTFSR 32'b?????_?????_00000_1111100000_1010011 `define FLW 32'b?????_?????_????????????_010_0000111 `define FLD 32'b?????_?????_????????????_011_0000111 `define FSW 32'b?????_?????_?????_???????_010_0100111 diff --git a/instr-table.tex b/instr-table.tex index ade746c..90453d8 100644 --- a/instr-table.tex +++ b/instr-table.tex @@ -121,6 +121,15 @@ & \multicolumn{1}{|c|}{0000000} & \multicolumn{2}{c|}{000} & +\multicolumn{4}{c|}{000000000000} & +\multicolumn{1}{c|}{00000} & +\multicolumn{1}{c|}{rd} & RDNPC rd \\ +\cline{2-10} + + +& +\multicolumn{1}{|c|}{0000000} & +\multicolumn{2}{c|}{000} & \multicolumn{3}{c|}{imm12hi} & \multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{rs1} & @@ -828,19 +837,19 @@ & \multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{rd} & RDNPC rd \\ +\multicolumn{2}{c|}{000} & +\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rd} & FENCE.I rd,rs1,imm12 \\ \cline{2-10} & \multicolumn{1}{|c|}{0000000} & -\multicolumn{5}{c|}{0000000000} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{00000} & SYNCI \\ +\multicolumn{2}{c|}{000} & +\multicolumn{4}{c|}{imm12} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rd} & FENCE rd,rs1,imm12 \\ \cline{2-10} @@ -849,16 +858,16 @@ \multicolumn{5}{c|}{0000000000} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{00000} & SYNC \\ +\multicolumn{1}{c|}{00000} & SYSCALL \\ \cline{2-10} & \multicolumn{1}{|c|}{0000000} & -\multicolumn{2}{c|}{000} & -\multicolumn{4}{c|}{imm12} & +\multicolumn{5}{c|}{0000000000} & +\multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{00000} & -\multicolumn{1}{c|}{00000} & SYSCALL imm12 \\ +\multicolumn{1}{c|}{00000} & BREAK \\ \cline{2-10} @@ -1323,6 +1332,78 @@ \multicolumn{1}{|c|}{0000000} & \multicolumn{5}{c|}{0000000011} & \multicolumn{1}{c|}{rs2} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rd} & FMIN.S rd,rs1,rs2 \\ +\cline{2-10} + + +& +\multicolumn{1}{|c|}{0000000} & +\multicolumn{5}{c|}{0000000011} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rd} & FMAX.S rd,rs1,rs2 \\ +\cline{2-10} + + +& +\multicolumn{1}{|c|}{0000000} & +\multicolumn{5}{c|}{0000000011} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rd} & FMINMAG.S rd,rs1,rs2 \\ +\cline{2-10} + + +& +\multicolumn{1}{|c|}{0000000} & +\multicolumn{5}{c|}{0000000011} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rd} & FMAXMAG.S rd,rs1,rs2 \\ +\cline{2-10} + + +& +\multicolumn{1}{|c|}{0000000} & +\multicolumn{5}{c|}{0000000011} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rd} & FMIN.D rd,rs1,rs2 \\ +\cline{2-10} + + +& +\multicolumn{1}{|c|}{0000000} & +\multicolumn{5}{c|}{0000000011} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rd} & FMAX.D rd,rs1,rs2 \\ +\cline{2-10} + + +& +\multicolumn{1}{|c|}{0000000} & +\multicolumn{5}{c|}{0000000011} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rd} & FMINMAG.D rd,rs1,rs2 \\ +\cline{2-10} + + +& +\multicolumn{1}{|c|}{0000000} & +\multicolumn{5}{c|}{0000000011} & +\multicolumn{1}{c|}{rs2} & +\multicolumn{1}{c|}{rs1} & +\multicolumn{1}{c|}{rd} & FMAXMAG.D rd,rs1,rs2 \\ +\cline{2-10} + + +& +\multicolumn{1}{|c|}{0000000} & +\multicolumn{5}{c|}{0000000011} & +\multicolumn{1}{c|}{rs2} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rd} & MFTX.S rd,rs2 \\ \cline{2-10} @@ -1369,7 +1450,7 @@ \multicolumn{5}{c|}{0000000011} & \multicolumn{1}{c|}{00000} & \multicolumn{1}{c|}{rs1} & -\multicolumn{1}{c|}{00000} & MTFSR rs1 \\ +\multicolumn{1}{c|}{rd} & MTFSR rd,rs1 \\ \cline{2-10} @@ -11,9 +11,10 @@ unimp 31..0=0 j imm25 6..2=0x19 1..0=3 jal imm25 6..2=0x1B 1..0=3 -jalr.c rd rs1 imm12 9..7=0 6..2=0x1A 1..0=3 -jalr.r rd rs1 imm12 9..7=1 6..2=0x1A 1..0=3 -jalr.j rd rs1 imm12 9..7=2 6..2=0x1A 1..0=3 +jalr.c rd rs1 imm12 9..7=0 6..2=0x1A 1..0=3 +jalr.r rd rs1 imm12 9..7=1 6..2=0x1A 1..0=3 +jalr.j rd rs1 imm12 9..7=2 6..2=0x1A 1..0=3 +rdnpc rd 26..22=0 21..10=0 9..7=4 6..2=0x1A 1..0=3 beq imm12hi rs1 rs2 imm12lo 9..7=0 6..2=0x18 1..0=3 bne imm12hi rs1 rs2 imm12lo 9..7=1 6..2=0x18 1..0=3 @@ -105,16 +106,17 @@ amomax.d rd rs1 rs2 16..10=5 9..7=3 6..2=0x10 1..0=3 amominu.d rd rs1 rs2 16..10=6 9..7=3 6..2=0x10 1..0=3 amomaxu.d rd rs1 rs2 16..10=7 9..7=3 6..2=0x10 1..0=3 -rdnpc rd 26..22=0 21..17=0 16..10=0 9..7=0 6..2=0x05 1..0=3 -synci 31..27=0 26..22=0 21..17=0 16..10=0 9..7=1 6..2=0x05 1..0=3 -sync 31..27=0 26..22=0 21..17=0 16..10=0 9..7=2 6..2=0x05 1..0=3 -syscall 31..27=0 26..22=0 imm12 9..7=3 6..2=0x05 1..0=3 +fence.i rd rs1 imm12 9..7=1 6..2=0x0B 1..0=3 +fence rd rs1 imm12 9..7=2 6..2=0x0B 1..0=3 -ei rd 26..22=0 21..17=0 16..10=0 9..7=0 6..2=0x1F 1..0=3 -di rd 26..22=0 21..17=0 16..10=1 9..7=0 6..2=0x1F 1..0=3 -mfpcr rd 26..22=0 rs2 16..10=0 9..7=1 6..2=0x1F 1..0=3 -mtpcr 31..27=0 rs1 rs2 16..10=1 9..7=1 6..2=0x1F 1..0=3 -eret 31..27=0 26..22=0 21..17=0 16..10=0 9..7=2 6..2=0x1F 1..0=3 +syscall 31..27=0 26..22=0 21..17=0 16..7=0 6..2=0x1D 1..0=3 +break 31..27=0 26..22=0 21..17=0 16..7=1 6..2=0x1D 1..0=3 + +ei rd 26..22=0 21..17=0 16..7=0 6..2=0x1E 1..0=3 +di rd 26..22=0 21..17=0 16..7=1 6..2=0x1E 1..0=3 +mfpcr rd 26..22=0 rs2 16..7=2 6..2=0x1E 1..0=3 +mtpcr 31..27=0 rs1 rs2 16..7=3 6..2=0x1E 1..0=3 +eret 31..27=0 26..22=0 21..17=0 16..7=4 6..2=0x1E 1..0=3 # 0x7C-0x7F are reserved for >32b instructions @@ -123,18 +125,18 @@ fsub.s rd rs1 rs2 16..12=1 rm 8..7=0 6..2=0x14 1..0=3 fmul.s rd rs1 rs2 16..12=2 rm 8..7=0 6..2=0x14 1..0=3 fdiv.s rd rs1 rs2 16..12=3 rm 8..7=0 6..2=0x14 1..0=3 fsqrt.s rd rs1 21..17=0 16..12=4 rm 8..7=0 6..2=0x14 1..0=3 -fsgnj.s rd rs1 rs2 16..12=5 11..9=7 8..7=0 6..2=0x14 1..0=3 -fsgnjn.s rd rs1 rs2 16..12=6 11..9=7 8..7=0 6..2=0x14 1..0=3 -fsgnjx.s rd rs1 rs2 16..12=7 11..9=7 8..7=0 6..2=0x14 1..0=3 +fsgnj.s rd rs1 rs2 16..12=5 11..9=0 8..7=0 6..2=0x14 1..0=3 +fsgnjn.s rd rs1 rs2 16..12=6 11..9=0 8..7=0 6..2=0x14 1..0=3 +fsgnjx.s rd rs1 rs2 16..12=7 11..9=0 8..7=0 6..2=0x14 1..0=3 fadd.d rd rs1 rs2 16..12=0x0 rm 8..7=1 6..2=0x14 1..0=3 fsub.d rd rs1 rs2 16..12=0x1 rm 8..7=1 6..2=0x14 1..0=3 fmul.d rd rs1 rs2 16..12=0x2 rm 8..7=1 6..2=0x14 1..0=3 fdiv.d rd rs1 rs2 16..12=0x3 rm 8..7=1 6..2=0x14 1..0=3 fsqrt.d rd rs1 21..17=0 16..12=0x4 rm 8..7=1 6..2=0x14 1..0=3 -fsgnj.d rd rs1 rs2 16..12=0x5 11..9=7 8..7=1 6..2=0x14 1..0=3 -fsgnjn.d rd rs1 rs2 16..12=0x6 11..9=7 8..7=1 6..2=0x14 1..0=3 -fsgnjx.d rd rs1 rs2 16..12=0x7 11..9=7 8..7=1 6..2=0x14 1..0=3 +fsgnj.d rd rs1 rs2 16..12=0x5 11..9=0 8..7=1 6..2=0x14 1..0=3 +fsgnjn.d rd rs1 rs2 16..12=0x6 11..9=0 8..7=1 6..2=0x14 1..0=3 +fsgnjx.d rd rs1 rs2 16..12=0x7 11..9=0 8..7=1 6..2=0x14 1..0=3 fcvt.l.s rd rs1 21..17=0 16..12=0x8 rm 8..7=0 6..2=0x14 1..0=3 fcvt.lu.s rd rs1 21..17=0 16..12=0x9 rm 8..7=0 6..2=0x14 1..0=3 @@ -153,26 +155,36 @@ fcvt.s.wu rd rs1 21..17=0 16..12=0xF rm 8..7=0 6..2=0x14 1..0=3 fcvt.d.l rd rs1 21..17=0 16..12=0xC rm 8..7=1 6..2=0x14 1..0=3 fcvt.d.lu rd rs1 21..17=0 16..12=0xD rm 8..7=1 6..2=0x14 1..0=3 -fcvt.d.w rd rs1 21..17=0 16..12=0xE 11..9=7 8..7=1 6..2=0x14 1..0=3 -fcvt.d.wu rd rs1 21..17=0 16..12=0xF 11..9=7 8..7=1 6..2=0x14 1..0=3 +fcvt.d.w rd rs1 21..17=0 16..12=0xE 11..9=0 8..7=1 6..2=0x14 1..0=3 +fcvt.d.wu rd rs1 21..17=0 16..12=0xF 11..9=0 8..7=1 6..2=0x14 1..0=3 fcvt.s.d rd rs1 21..17=0 16..14=0x4 13..12=1 rm 8..7=0 6..2=0x14 1..0=3 fcvt.d.s rd rs1 21..17=0 16..14=0x4 13..12=0 rm 8..7=1 6..2=0x14 1..0=3 -feq.s rd rs1 rs2 16..12=0x15 11..9=7 8..7=0 6..2=0x14 1..0=3 -flt.s rd rs1 rs2 16..12=0x16 11..9=7 8..7=0 6..2=0x14 1..0=3 -fle.s rd rs1 rs2 16..12=0x17 11..9=7 8..7=0 6..2=0x14 1..0=3 - -feq.d rd rs1 rs2 16..12=0x15 11..9=7 8..7=1 6..2=0x14 1..0=3 -flt.d rd rs1 rs2 16..12=0x16 11..9=7 8..7=1 6..2=0x14 1..0=3 -fle.d rd rs1 rs2 16..12=0x17 11..9=7 8..7=1 6..2=0x14 1..0=3 - -mftx.s rd 26..22=0 rs2 16..12=0x18 11..9=7 8..7=0 6..2=0x14 1..0=3 -mftx.d rd 26..22=0 rs2 16..12=0x18 11..9=7 8..7=1 6..2=0x14 1..0=3 -mffsr rd 26..22=0 21..17=0 16..12=0x1B 11..9=7 8..7=0 6..2=0x14 1..0=3 -mxtf.s rd rs1 21..17=0 16..12=0x1C 11..9=7 8..7=0 6..2=0x14 1..0=3 -mxtf.d rd rs1 21..17=0 16..12=0x1C 11..9=7 8..7=1 6..2=0x14 1..0=3 -mtfsr 31..27=0 rs1 21..17=0 16..12=0x1D 11..9=7 8..7=0 6..2=0x14 1..0=3 +feq.s rd rs1 rs2 16..12=0x15 11..9=0 8..7=0 6..2=0x14 1..0=3 +flt.s rd rs1 rs2 16..12=0x16 11..9=0 8..7=0 6..2=0x14 1..0=3 +fle.s rd rs1 rs2 16..12=0x17 11..9=0 8..7=0 6..2=0x14 1..0=3 + +feq.d rd rs1 rs2 16..12=0x15 11..9=0 8..7=1 6..2=0x14 1..0=3 +flt.d rd rs1 rs2 16..12=0x16 11..9=0 8..7=1 6..2=0x14 1..0=3 +fle.d rd rs1 rs2 16..12=0x17 11..9=0 8..7=1 6..2=0x14 1..0=3 + +fmin.s rd rs1 rs2 16..12=0x18 11..9=0 8..7=0 6..2=0x14 1..0=3 +fmax.s rd rs1 rs2 16..12=0x19 11..9=0 8..7=0 6..2=0x14 1..0=3 +fminmag.s rd rs1 rs2 16..12=0x1A 11..9=0 8..7=0 6..2=0x14 1..0=3 +fmaxmag.s rd rs1 rs2 16..12=0x1B 11..9=0 8..7=0 6..2=0x14 1..0=3 + +fmin.d rd rs1 rs2 16..12=0x18 11..9=0 8..7=1 6..2=0x14 1..0=3 +fmax.d rd rs1 rs2 16..12=0x19 11..9=0 8..7=1 6..2=0x14 1..0=3 +fminmag.d rd rs1 rs2 16..12=0x1A 11..9=0 8..7=1 6..2=0x14 1..0=3 +fmaxmag.d rd rs1 rs2 16..12=0x1B 11..9=0 8..7=1 6..2=0x14 1..0=3 + +mftx.s rd 26..22=0 rs2 16..12=0x1C 11..9=0 8..7=0 6..2=0x14 1..0=3 +mftx.d rd 26..22=0 rs2 16..12=0x1C 11..9=0 8..7=1 6..2=0x14 1..0=3 +mffsr rd 26..22=0 21..17=0 16..12=0x1D 11..9=0 8..7=0 6..2=0x14 1..0=3 +mxtf.s rd rs1 21..17=0 16..12=0x1E 11..9=0 8..7=0 6..2=0x14 1..0=3 +mxtf.d rd rs1 21..17=0 16..12=0x1E 11..9=0 8..7=1 6..2=0x14 1..0=3 +mtfsr rd rs1 21..17=0 16..12=0x1F 11..9=0 8..7=0 6..2=0x14 1..0=3 flw rd rs1 imm12 9..7=2 6..2=0x01 1..0=3 fld rd rs1 imm12 9..7=3 6..2=0x01 1..0=3 diff --git a/parse-opcodes b/parse-opcodes index 3f9f958..ad07965 100755 --- a/parse-opcodes +++ b/parse-opcodes @@ -38,7 +38,8 @@ typelut[0x3B] = 4 typelut[0x03] = 3 typelut[0x23] = 10 typelut[0x27] = 4 -typelut[0x17] = 4 +typelut[0x2F] = 4 +typelut[0x77] = 4 typelut[0x07] = 3 typelut[0x27] = 10 typelut[0x53] = 4 @@ -46,7 +47,7 @@ typelut[0x43] = 5 typelut[0x47] = 5 typelut[0x4B] = 5 typelut[0x4F] = 5 -typelut[0x7F] = 4 +typelut[0x7B] = 4 def binary(n, digits=0): rep = bin(n)[2:] |