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| author | Jerry Zhao <qwertyuiopghb@gmail.com> | 2024-08-27 19:40:29 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-08-27 19:40:29 -0700 |
| commit | 5029aa7ce84947d969fa7624b970ddfd026ee0b8 (patch) | |
| tree | 04c0444d259be2135487c676b4905590fe9700b6 | |
| parent | 60f02dd1d8ab4f0e9182469425196b96ceb3bb8a (diff) | |
| parent | eb07f100a37c12d2c0eb5501394c6c09342985c8 (diff) | |
| download | riscv-isa-sim-5029aa7ce84947d969fa7624b970ddfd026ee0b8.zip riscv-isa-sim-5029aa7ce84947d969fa7624b970ddfd026ee0b8.tar.gz riscv-isa-sim-5029aa7ce84947d969fa7624b970ddfd026ee0b8.tar.bz2 | |
Merge pull request #1787 from riscv-software-src/fix-cfg-priv
| -rw-r--r-- | riscv/sim.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/sim.cc b/riscv/sim.cc index a44aea9..115fc0c 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -195,7 +195,7 @@ sim_t::sim_t(const cfg_t *cfg, bool halted, exit(1); } - procs.push_back(new processor_t(isa_str, DEFAULT_PRIV, + procs.push_back(new processor_t(isa_str, cfg->priv, cfg, this, hartid, halted, log_file.get(), sout_)); harts[hartid] = procs[cpu_idx]; |