Age | Commit message (Collapse) | Author | Files | Lines | |
---|---|---|---|---|---|
2016-05-02 | Remove tohost/fromhost CSRs | Andrew Waterman | 1 | -0/+0 | |
2016-04-30 | ERET -> xRET; change memory map | Andrew Waterman | 1 | -0/+0 | |
2016-03-14 | update tests | Andrew Waterman | 1 | -0/+0 | |
2016-03-14 | WIP on privileged spec v1.9 | Andrew Waterman | 1 | -0/+0 | |
2016-03-01 | bump tests and spike for fcvt change | Colin Schmidt | 1 | -0/+0 | |
2016-02-29 | bump tests for new fsqrt test | Colin Schmidt | 1 | -0/+0 | |
2016-02-23 | riscv-tests has proper install rule, no more need for special-casing | Howard Mao | 1 | -0/+0 | |
2016-01-12 | new NaN semantics; change MIPI behavior | Andrew Waterman | 1 | -0/+0 | |
2016-01-05 | bump submodules | Scott Beamer | 1 | -0/+0 | |
2015-11-25 | Use MMIO for device discovery | Andrew Waterman | 1 | -0/+0 | |
2015-09-28 | bump submodules | Scott Beamer | 1 | -0/+0 | |
2015-08-18 | Upgrade to privileged architecture v1.7, sans qemu | Andrew Waterman | 1 | -0/+0 | |
2015-02-17 | sync up riscv-tools | Yunsup Lee | 1 | -0/+0 | |
2015-02-07 | Update riscv-tests to the latest master | Palmer Dabbelt | 1 | -0/+0 | |
This moves the recursive submodule pointers to github.com/riscv | |||||
2015-01-20 | update all repos | Andrew Waterman | 1 | -0/+0 | |
2015-01-04 | update all repos | Andrew Waterman | 1 | -0/+0 | |
2014-12-03 | New ABI/tool | Andrew Waterman | 1 | -0/+0 | |
2014-11-12 | bump tests | Henry Cook | 1 | -0/+0 | |
2014-10-24 | push isa-sim,opcodes,pk,tests | Yunsup Lee | 1 | -0/+0 | |
2014-10-12 | bump submodule versions | Scott Beamer | 1 | -0/+0 | |
2014-09-02 | bump tests | Henry Cook | 1 | -0/+0 | |
2014-08-21 | bump submodule versions | Scott Beamer | 1 | -0/+0 | |
2014-07-30 | bump submodules | Sagar Karandikar | 1 | -0/+0 | |
2014-04-25 | Various toolchain fixes/improvements | Andrew Waterman | 1 | -0/+0 | |
2014-04-08 | Push riscv-tests | Stephen Twigg | 1 | -0/+0 | |
2014-04-08 | Update riscv-tests (radix sort bmark added) | Stephen Twigg | 1 | -0/+0 | |
2014-04-07 | Update riscv-opcodes. Other correspondent projects made consistent. | Stephen Twigg | 1 | -0/+0 | |
2014-03-08 | Add fclass.{s|d} instructions | Andrew Waterman | 1 | -0/+0 | |
2014-03-03 | update tests | Yunsup Lee | 1 | -0/+0 | |
2014-03-02 | sync up gcc,isa-sim,opcodes,pk,tests | Yunsup Lee | 1 | -0/+0 | |
2014-02-27 | push tests | Yunsup Lee | 1 | -0/+0 | |
2014-02-27 | push tests | Yunsup Lee | 1 | -0/+0 | |
2014-02-25 | push tests | Yunsup Lee | 1 | -0/+0 | |
2014-02-14 | Renumber uarch CSRs into custom CSR space | Andrew Waterman | 1 | -0/+0 | |
2014-02-10 | Revert to old AUIPC definition | Andrew Waterman | 1 | -0/+0 | |
2014-02-06 | push gcc,spike,pk,tests | Yunsup Lee | 1 | -0/+0 | |
2014-02-06 | Add support for uarch-specific performance counters | Andrew Waterman | 1 | -0/+0 | |
2014-02-03 | Remove vsetprec and add vfmsv, vfmvv | Quan Nguyen | 1 | -0/+0 | |
2014-01-31 | Fix Darwin build | Andrew Waterman | 1 | -0/+0 | |
2014-01-28 | Fix some bugs related to dynamic linking | Andrew Waterman | 1 | -0/+0 | |
2014-01-21 | Generate CAUSE numbers from riscv-opcodes; add CSR test | Andrew Waterman | 1 | -0/+0 | |
2014-01-20 | Catch up to recent toolchain changes | Quan Nguyen | 1 | -0/+0 | |
2013-11-13 | getting ready for torture test generator | Yunsup Lee | 1 | -0/+0 | |
2013-11-05 | push isa-sim,pk,tests | Yunsup Lee | 1 | -0/+0 | |
2013-10-18 | push isa-sim,opcodes,tests | Yunsup Lee | 1 | -0/+0 | |
2013-10-18 | push isa-sim,tests | Yunsup Lee | 1 | -0/+0 | |
2013-10-17 | push gcc,isa-sim,opcodes,tests | Yunsup Lee | 1 | -0/+0 | |
2013-10-17 | push gcc,isa-sim,opcodes,tests | Yunsup Lee | 1 | -0/+0 | |
2013-10-10 | push gcc,isa-sim,opcodes,pk,tests | Yunsup Lee | 1 | -0/+0 | |
2013-09-21 | Update tests | Andrew Waterman | 1 | -0/+0 | |