aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2014-01-13Swap JAL/JALR encoding; various GCC fixesAndrew Waterman6-0/+0
2013-12-29Update gcc and pkAndrew Waterman2-0/+0
2013-12-09Update to new RDCYCLE/FCSR encodingAndrew Waterman4-0/+0
2013-11-29Add vsetprec instruction prototypeQuan Nguyen3-0/+0
2013-11-26Create confprec tool branchQuan Nguyen4-0/+0
2013-11-25Update to new privileged ISAAndrew Waterman6-0/+0
2013-11-22push opcodesYunsup Lee1-0/+0
2013-11-21push testsYunsup Lee1-0/+0
2013-11-21fix slli/slliw encoding bugYunsup Lee4-0/+0
thanks to dina@technion
2013-11-13push fesvrYunsup Lee1-0/+0
2013-11-13getting ready for torture test generatorYunsup Lee2-0/+0
2013-11-05push isa-sim,pk,testsYunsup Lee3-0/+0
2013-10-29push opcodesYunsup Lee1-0/+0
2013-10-28push isa-simYunsup Lee1-0/+0
2013-10-21push isa-simYunsup Lee1-0/+0
2013-10-18push isa-sim,opcodes,testsYunsup Lee3-0/+0
2013-10-18push isa-sim,testsYunsup Lee2-0/+0
2013-10-18push isa-simYunsup Lee1-0/+0
2013-10-17push gcc,isa-sim,opcodes,testsYunsup Lee4-0/+0
2013-10-17push gcc,isa-sim,opcodes,testsYunsup Lee4-0/+0
2013-10-10push gcc,isa-sim,opcodes,pk,testsYunsup Lee5-0/+0
2013-09-22Hammer spike (fix issue with accelerator instructions)Stephen Twigg1-0/+0
2013-09-21Update testsAndrew Waterman1-0/+0
2013-09-21New ISA encodingAndrew Waterman6-0/+0
2013-07-08Use more recent version of riscv-gcc (fixed issue with compiling under gcc 4.8)Stephen Twigg1-0/+0
2013-07-01allows for an external CC & CXX that will be overwritten allowing the pk ↵Scott Beamer1-1/+1
build to use riscv-gcc. useful for osx & gcc-4.7
2013-06-10Fix Darwin build againAndrew Waterman5-0/+0
2013-06-10Rename build-nogcc.sh to build-spike-only.shAndrew Waterman1-0/+0
After all, that's what it does.
2013-05-24push riscv-fesvr,riscv-pkYunsup Lee2-0/+0
2013-05-22push riscv-fesvrYunsup Lee1-0/+0
2013-05-18fix gcc install locationAndrew Waterman1-1/+1
2013-05-15push riscv-isa-simYunsup Lee1-0/+0
2013-05-13compile riscv-tests/benchmarks tooYunsup Lee1-1/+6
2013-05-13push riscv-isa-sim,riscv-testsYunsup Lee2-0/+0
2013-04-29use new gcc configure script; build isa testsAndrew Waterman6-10/+12
2013-04-29push riscv-isa-simYunsup Lee1-0/+0
2013-04-29add READMEYunsup Lee1-0/+10
2013-04-29add riscv-testsYunsup Lee2-0/+3
2013-04-24push riscv-gcc,riscv-isa-simYunsup Lee2-0/+0
2013-04-22push riscv-isa-simYunsup Lee1-0/+0
2013-04-19push riscv-fesvr,riscv-gcc,riscv-isa-sim,riscv-opcodes,riscv-pkYunsup Lee5-0/+0
2013-03-19push riscv-gcc,riscv-isa-sim,riscv-pkYunsup Lee3-0/+0
2013-02-13add cache simulators to isa simulatorAndrew Waterman3-0/+0
2013-01-26update fesvrAndrew Waterman1-0/+0
2013-01-25push riscv-isa-simAndrew Waterman1-0/+0
2013-01-25update to library-based fesvr; assume $RISCV env varAndrew Waterman7-72/+68
2012-11-13revamp vector support in compiler and isa simulatorYunsup Lee2-0/+0
2012-09-04update tohost/fromhost protocol; fix FP emulationAndrew Waterman3-0/+0
2012-08-17update riscv-fesvrYunsup Lee1-0/+0
2012-07-22fix HTIF reset behaviorAndrew Waterman2-0/+0
generated by cgit v1.1 at 2024-10-18 21:54:24 +0000