aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAndrew Waterman <waterman@cs.berkeley.edu>2016-04-30 20:57:21 -0700
committerAndrew Waterman <waterman@cs.berkeley.edu>2016-04-30 20:57:21 -0700
commit40a956a7a5335c051416a69eed7d28936b8d967a (patch)
tree8c5acd3283bfa9308d5d27ed39c356cfd9ca1f9c
parent85b6d431384b75fb3fd73daed26a74d887f961fc (diff)
downloadriscv-tools-40a956a7a5335c051416a69eed7d28936b8d967a.zip
riscv-tools-40a956a7a5335c051416a69eed7d28936b8d967a.tar.gz
riscv-tools-40a956a7a5335c051416a69eed7d28936b8d967a.tar.bz2
ERET -> xRET; change memory map
m---------riscv-fesvr0
m---------riscv-gnu-toolchain0
m---------riscv-isa-sim0
m---------riscv-opcodes0
m---------riscv-pk0
m---------riscv-tests0
6 files changed, 0 insertions, 0 deletions
diff --git a/riscv-fesvr b/riscv-fesvr
-Subproject 1c02bd61a20d1393e5826b4174e3bb7097336ca
+Subproject 0c581ea8fa77cfe7cfe2a9413179c1ce31fdd0c
diff --git a/riscv-gnu-toolchain b/riscv-gnu-toolchain
-Subproject 11fb8bbdb07e80a5b02c9e8753482fb739152be
+Subproject 014a55d319783a15fc55f6c6fb498b754feb70e
diff --git a/riscv-isa-sim b/riscv-isa-sim
-Subproject 10ae74e48aee7403bc3cb2540d1a7ccb7c69a21
+Subproject c3b19169fb150f7084edff3aad0e1d5dd2b48fc
diff --git a/riscv-opcodes b/riscv-opcodes
-Subproject fee20f1c9002a67c7fce73d483f59a6804219ab
+Subproject af5e124a62e832ad7ccd0fc9b16f2438feee76a
diff --git a/riscv-pk b/riscv-pk
-Subproject d5278834830bdd2cb8586f25fe05ae917b0eb94
+Subproject 7389e46cd013e0cd23af8a6531e9e104b5a31d0
diff --git a/riscv-tests b/riscv-tests
-Subproject 35c6ac438af5086510fe120b575090cf8e9b917
+Subproject 22742246287feda0be2666ba14ca6f4a6bc73bb