diff options
| author | Palmer Dabbelt <palmer@dabbelt.com> | 2017-05-17 13:04:57 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-05-17 13:04:57 -0700 |
| commit | 58a992068cba1c192df2a824efa39f50bff628ee (patch) | |
| tree | 067172650cc8ebe62defb89aea79e79b7c6ca3f9 | |
| parent | cf7369999779bc78bcc5a8a6fe6187363b23247a (diff) | |
| parent | 625e7e4fd0e44fa01b30e176a7e6e0b96bb206eb (diff) | |
| download | riscv-tools-58a992068cba1c192df2a824efa39f50bff628ee.zip riscv-tools-58a992068cba1c192df2a824efa39f50bff628ee.tar.gz riscv-tools-58a992068cba1c192df2a824efa39f50bff628ee.tar.bz2 | |
Merge pull request #74 from riscv/debug-0.13
debug-0.13 merge
| -rw-r--r-- | .travis.yml | 7 | ||||
| -rwxr-xr-x | build.sh | 2 | ||||
| m--------- | riscv-gnu-toolchain | 0 | ||||
| m--------- | riscv-isa-sim | 0 | ||||
| m--------- | riscv-opcodes | 0 | ||||
| m--------- | riscv-openocd | 0 | ||||
| m--------- | riscv-pk | 0 | ||||
| m--------- | riscv-tests | 0 |
8 files changed, 5 insertions, 4 deletions
diff --git a/.travis.yml b/.travis.yml index 3100a4b..f5d0ede 100644 --- a/.travis.yml +++ b/.travis.yml @@ -24,11 +24,12 @@ addons: - texinfo - python-pexpect - libusb-1.0-0-dev + - device-tree-compiler env: global: - RISCV="/home/travis/riscv_install" - - MAKEFLAGS="-j3" + - MAKEFLAGS="-j2" - PATH="/home/travis/riscv_install/bin:$PATH" before_install: @@ -50,5 +51,5 @@ install: travis_wait script: - ./build.sh - #- cd riscv-tests/build - #- make debug-check + - cd riscv-tests/build + - make debug-check || (tail debug/*.log; exit 1) @@ -7,7 +7,7 @@ echo "Starting RISC-V Toolchain build process" -build_project riscv-openocd --prefix=$RISCV --enable-remote-bitbang +build_project riscv-openocd --prefix=$RISCV --enable-remote-bitbang --enable-jtag_vpi build_project riscv-fesvr --prefix=$RISCV build_project riscv-isa-sim --prefix=$RISCV --with-fesvr=$RISCV build_project riscv-gnu-toolchain --prefix=$RISCV diff --git a/riscv-gnu-toolchain b/riscv-gnu-toolchain -Subproject 8b464a814a32671d8315eba5fcab10d0efc8508 +Subproject a71fc539850f8dacf232fc580743b946c376014 diff --git a/riscv-isa-sim b/riscv-isa-sim -Subproject 75f2a05df9cdff6f3faba748065b3184b9f01b0 +Subproject a1f754b2f0ec5fe72c86d6916d7c603e7727e68 diff --git a/riscv-opcodes b/riscv-opcodes -Subproject 18383e76bd447bf3d1887026791f938bf253a87 +Subproject f8bab126082ce7fcd9e91ad54918bd1cf913da3 diff --git a/riscv-openocd b/riscv-openocd -Subproject ba3a56937bc921a72b672d666a60ea4292cff44 +Subproject c431c0eb251bf6d02959a6f55be3baba04552b5 diff --git a/riscv-pk b/riscv-pk -Subproject 3aebe0db7f08f0aeed154be9c78ea872c66fb1e +Subproject 66701f82f88d08d3700d8b0bc5d5306abfd0044 diff --git a/riscv-tests b/riscv-tests -Subproject af832bf8fd7ed43631e1d1ceb66b10027419a4e +Subproject 2b0193de9f7cb43d3b3c519fe8eff497ea73859 |