From 81ad66f25ce4c15180e558696961bd8eaf967fea Mon Sep 17 00:00:00 2001
From: Yunsup Lee <yunsup@cs.berkeley.edu>
Date: Mon, 22 Apr 2013 14:56:59 -0700
Subject: initial commit

---
 isa/rv64uv/imul.S | 82 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 82 insertions(+)
 create mode 100644 isa/rv64uv/imul.S

(limited to 'isa/rv64uv/imul.S')

diff --git a/isa/rv64uv/imul.S b/isa/rv64uv/imul.S
new file mode 100644
index 0000000..bb9b6a3
--- /dev/null
+++ b/isa/rv64uv/imul.S
@@ -0,0 +1,82 @@
+#*****************************************************************************
+# imul.S
+#-----------------------------------------------------------------------------
+#
+# Test imul instruction in a vf block.
+#
+
+#include "riscv_test.h"
+#include "test_macros.h"
+
+RVTEST_RV64U
+RVTEST_CODE_BEGIN
+
+  li a3,2048
+  vvcfgivl a3,a3,3,0
+
+  li a4,20
+  li s0,2
+  vmsv vx1,a4
+  lui a0,%hi(vtcode)
+  vf %lo(vtcode)(a0)
+
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  mul s1,a4,s0
+
+  la a5,dest
+  vsd vx1,a5
+  fence.v.l
+
+  li s2,40
+  li x28,2
+  bne s1,s2,fail
+
+  li a1,0
+  li a2,0
+loop:
+  ld a0,0(a5)
+  addi x28,a2,3
+  bne a0,a1,fail
+  addi a5,a5,8
+  addi a1,a1,20
+  addi a2,a2,1
+  bne a2,a3,loop
+  j pass
+
+vtcode:
+  utidx x2
+  mul x1,x2,x1
+  stop
+
+  TEST_PASSFAIL
+
+RVTEST_CODE_END
+
+  .data
+RVTEST_DATA_BEGIN
+
+  TEST_DATA
+
+dest:
+  .skip 16384
+
+RVTEST_DATA_END
-- 
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