From 81ad66f25ce4c15180e558696961bd8eaf967fea Mon Sep 17 00:00:00 2001 From: Yunsup Lee Date: Mon, 22 Apr 2013 14:56:59 -0700 Subject: initial commit --- isa/rv64uf/Makefile | 120 ++++++++++++++++++++++++++++++++++++++++++++++++ isa/rv64uf/fadd.S | 51 ++++++++++++++++++++ isa/rv64uf/fcmp.S | 35 ++++++++++++++ isa/rv64uf/fcvt.S | 54 ++++++++++++++++++++++ isa/rv64uf/fcvt_w.S | 83 +++++++++++++++++++++++++++++++++ isa/rv64uf/fmadd.S | 59 ++++++++++++++++++++++++ isa/rv64uf/fmin.S | 55 ++++++++++++++++++++++ isa/rv64uf/fsgnj.S | 57 +++++++++++++++++++++++ isa/rv64uf/ldst.S | 30 ++++++++++++ isa/rv64uf/move.S | 39 ++++++++++++++++ isa/rv64uf/structural.S | 56 ++++++++++++++++++++++ 11 files changed, 639 insertions(+) create mode 100644 isa/rv64uf/Makefile create mode 100644 isa/rv64uf/fadd.S create mode 100644 isa/rv64uf/fcmp.S create mode 100644 isa/rv64uf/fcvt.S create mode 100644 isa/rv64uf/fcvt_w.S create mode 100644 isa/rv64uf/fmadd.S create mode 100644 isa/rv64uf/fmin.S create mode 100644 isa/rv64uf/fsgnj.S create mode 100644 isa/rv64uf/ldst.S create mode 100644 isa/rv64uf/move.S create mode 100644 isa/rv64uf/structural.S (limited to 'isa/rv64uf') diff --git a/isa/rv64uf/Makefile b/isa/rv64uf/Makefile new file mode 100644 index 0000000..65470ed --- /dev/null +++ b/isa/rv64uf/Makefile @@ -0,0 +1,120 @@ +#======================================================================= +# Makefile for riscv-tests +#----------------------------------------------------------------------- + +default: all + +#-------------------------------------------------------------------- +# Sources +#-------------------------------------------------------------------- + +rv64uf_sc_tests = \ + fadd fcmp fcvt fcvt_w fmadd fmin fsgnj \ + ldst move structural \ + +rv64uf_mc_tests =\ + +rv64uf_sc_vec_tests = \ + fadd fcmp fcvt fcvt_w fmadd fmin fsgnj \ + +#-------------------------------------------------------------------- +# Build rules +#-------------------------------------------------------------------- + +RISCV_GCC = riscv-gcc +RISCV_GCC_OPTS = -nostdlib -nostartfiles +RISCV_OBJDUMP = riscv-objdump --disassemble-all --disassemble-zeroes --section=.text --section=.data --section=.bss +RISCV_SIM = riscv-isa-run + +#------------------------------------------------------------ +# Build assembly tests + +%.hex: % + elf2hex 16 16384 $< > $@ + +%.dump: % + $(RISCV_OBJDUMP) $< > $@ + +%.out: % + $(RISCV_SIM) $< 2> $@ + +rv64uf_p_tests_bin = $(addprefix rv64uf-p-, $(rv64uf_sc_tests)) +rv64uf_p_tests_dump = $(addsuffix .dump, $(rv64uf_p_tests_bin)) +rv64uf_p_tests_hex = $(addsuffix .hex, $(rv64uf_p_tests_bin)) +rv64uf_p_tests_out = $(addsuffix .out, $(rv64uf_p_tests_bin)) + +$(rv64uf_p_tests_bin): rv64uf-p-%: %.S + $(RISCV_GCC) $(RISCV_GCC_OPTS) -I../../env/p -I../macros/scalar -T../../env/p/link.ld $< -o $@ + +rv64uf_pm_tests_bin = $(addprefix rv64uf-pm-, $(rv64uf_mc_tests)) +rv64uf_pm_tests_dump = $(addsuffix .dump, $(rv64uf_pm_tests_bin)) +rv64uf_pm_tests_hex = $(addsuffix .hex, $(rv64uf_pm_tests_bin)) +rv64uf_pm_tests_out = $(addsuffix .out, $(rv64uf_pm_tests_bin)) + +$(rv64uf_pm_tests_bin): rv64uf-pm-%: %.S + $(RISCV_GCC) $(RISCV_GCC_OPTS) -I../../env/pm -I../macros/scalar -T../../env/pm/link.ld $< -o $@ + +rv64uf_v_tests_bin = $(addprefix rv64uf-v-, $(rv64uf_sc_tests)) +rv64uf_v_tests_dump = $(addsuffix .dump, $(rv64uf_v_tests_bin)) +rv64uf_v_tests_hex = $(addsuffix .hex, $(rv64uf_v_tests_bin)) +rv64uf_v_tests_out = $(addsuffix .out, $(rv64uf_v_tests_bin)) + +$(rv64uf_v_tests_bin): rv64uf-v-%: %.S + $(RISCV_GCC) $(RISCV_GCC_OPTS) -std=gnu99 -O2 -I../../env/v -I../macros/scalar -T../../env/v/link.ld ../../env/v/entry.S ../../env/v/vm.c $< -lc -o $@ + +rv64uf_p_vec_tests_bin = $(addprefix rv64uf-p-vec-, $(rv64uf_sc_vec_tests)) +rv64uf_p_vec_tests_dump = $(addsuffix .dump, $(rv64uf_p_vec_tests_bin)) +rv64uf_p_vec_tests_hex = $(addsuffix .hex, $(rv64uf_p_vec_tests_bin)) +rv64uf_p_vec_tests_out = $(addsuffix .out, $(rv64uf_p_vec_tests_bin)) + +$(rv64uf_p_vec_tests_bin): rv64uf-p-vec-%: %.S + $(RISCV_GCC) $(RISCV_GCC_OPTS) -I../../env/p -I../macros/vector -T../../env/p/link.ld $< -o $@ + +rv64uf_pt_vec_tests_bin = $(addprefix rv64uf-pt-vec-, $(rv64uf_sc_vec_tests)) +rv64uf_pt_vec_tests_dump = $(addsuffix .dump, $(rv64uf_pt_vec_tests_bin)) +rv64uf_pt_vec_tests_hex = $(addsuffix .hex, $(rv64uf_pt_vec_tests_bin)) +rv64uf_pt_vec_tests_out = $(addsuffix .out, $(rv64uf_pt_vec_tests_bin)) + +$(rv64uf_pt_vec_tests_bin): rv64uf-pt-vec-%: %.S + $(RISCV_GCC) $(RISCV_GCC_OPTS) -I../../env/pt -I../macros/vector -T../../env/pt/link.ld $< -o $@ + +rv64uf_v_vec_tests_bin = $(addprefix rv64uf-v-vec-, $(rv64uf_sc_vec_tests)) +rv64uf_v_vec_tests_dump = $(addsuffix .dump, $(rv64uf_v_vec_tests_bin)) +rv64uf_v_vec_tests_hex = $(addsuffix .hex, $(rv64uf_v_vec_tests_bin)) +rv64uf_v_vec_tests_out = $(addsuffix .out, $(rv64uf_v_vec_tests_bin)) + +$(rv64uf_v_vec_tests_bin): rv64uf-v-vec-%: %.S + $(RISCV_GCC) $(RISCV_GCC_OPTS) -std=gnu99 -O2 -I../../env/v -I../macros/vector -T../../env/v/link.ld ../../env/v/entry.S ../../env/v/vm.c $< -lc -o $@ + +riscv-: \ + $(rv64uf_p_tests_dump) $(rv64uf_p_tests_hex) \ + $(rv64uf_pm_tests_dump) $(rv64uf_pm_tests_hex) \ + $(rv64uf_v_tests_dump) $(rv64uf_v_tests_hex) \ + $(rv64uf_p_vec_tests_dump) $(rv64uf_p_vec_tests_hex) \ + $(rv64uf_pt_vec_tests_dump) $(rv64uf_pt_vec_tests_hex) \ + $(rv64uf_v_vec_tests_dump) $(rv64uf_v_vec_tests_hex) \ + +out = $(rv64uf_p_tests_out) $(rv64uf_pm_tests_out) $(rv64uf_v_tests_out) $(rv64uf_p_vec_tests_out) $(rv64uf_v_vec_tests_out) + +run: $(out) + echo; perl -ne 'print " [$$1] $$ARGV \t$$2\n" if /\*{3}(.{8})\*{3}(.*)/' \ + $(out); echo; + +junk += \ + $(rv64uf_p_tests_bin) $(rv64uf_p_tests_dump) $(rv64uf_p_tests_hex) $(rv64uf_p_tests_out) \ + $(rv64uf_pm_tests_bin) $(rv64uf_pm_tests_dump) $(rv64uf_pm_tests_hex) $(rv64uf_pm_tests_out) \ + $(rv64uf_v_tests_bin) $(rv64uf_v_tests_dump) $(rv64uf_v_tests_hex) $(rv64uf_v_tests_out) \ + $(rv64uf_p_vec_tests_bin) $(rv64uf_p_vec_tests_dump) $(rv64uf_p_vec_tests_hex) $(rv64uf_p_vec_tests_out) \ + $(rv64uf_pt_vec_tests_bin) $(rv64uf_pt_vec_tests_dump) $(rv64uf_pt_vec_tests_hex) $(rv64uf_pt_vec_tests_out) \ + $(rv64uf_v_vec_tests_bin) $(rv64uf_v_vec_tests_dump) $(rv64uf_v_vec_tests_hex) $(rv64uf_v_vec_tests_out) \ + +#------------------------------------------------------------ +# Default + +all: riscv- + +#------------------------------------------------------------ +# Clean up + +clean: + rm -rf $(junk) diff --git a/isa/rv64uf/fadd.S b/isa/rv64uf/fadd.S new file mode 100644 index 0000000..58f44be --- /dev/null +++ b/isa/rv64uf/fadd.S @@ -0,0 +1,51 @@ +#***************************************************************************** +# fadd.S +#----------------------------------------------------------------------------- +# +# Test f{add|sub|mul}.{s|d} instructions. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_FP_OP2_S( 2, fadd.s, 3.5, 2.5, 1.0 ); + TEST_FP_OP2_S( 3, fadd.s, -1234, -1235.1, 1.1 ); + TEST_FP_OP2_S( 4, fadd.s, 3.14159265, 3.14159265, 0.00000001 ); + + TEST_FP_OP2_D( 5, fadd.d, 3.5, 2.5, 1.0 ); + TEST_FP_OP2_D( 6, fadd.d, -1234, -1235.1, 1.1 ); + TEST_FP_OP2_D( 7, fadd.d, 3.14159266, 3.14159265, 0.00000001 ); + + TEST_FP_OP2_S(12, fsub.s, 1.5, 2.5, 1.0 ); + TEST_FP_OP2_S(13, fsub.s, -1234, -1235.1, -1.1 ); + TEST_FP_OP2_S(14, fsub.s, 3.14159265, 3.14159265, 0.00000001 ); + + TEST_FP_OP2_D(15, fsub.d, 1.5, 2.5, 1.0 ); + TEST_FP_OP2_D(16, fsub.d, -1234, -1235.1, -1.1 ); + TEST_FP_OP2_D(17, fsub.d, 3.1415926400000001, 3.14159265, 0.00000001 ); + + TEST_FP_OP2_S(22, fmul.s, 2.5, 2.5, 1.0 ); + TEST_FP_OP2_S(23, fmul.s, 1358.61, -1235.1, -1.1 ); + TEST_FP_OP2_S(24, fmul.s, 3.14159265e-8, 3.14159265, 0.00000001 ); + + TEST_FP_OP2_D(25, fmul.d, 2.5, 2.5, 1.0 ); + TEST_FP_OP2_D(26, fmul.d, 1358.61, -1235.1, -1.1 ); + TEST_FP_OP2_D(27, fmul.d, 3.14159265e-8, 3.14159265, 0.00000001 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +RVTEST_DATA_END diff --git a/isa/rv64uf/fcmp.S b/isa/rv64uf/fcmp.S new file mode 100644 index 0000000..845db3c --- /dev/null +++ b/isa/rv64uf/fcmp.S @@ -0,0 +1,35 @@ +#***************************************************************************** +# fcmp.S +#----------------------------------------------------------------------------- +# +# Test f{eq|lt|le}.{s|d} instructions. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_FP_CMP_OP_S( 2, feq.s, 1, -1.36, -1.36) + TEST_FP_CMP_OP_S( 3, fle.s, 1, -1.36, -1.36) + TEST_FP_CMP_OP_S( 4, flt.s, 0, -1.36, -1.36) + + TEST_FP_CMP_OP_S( 5, feq.s, 0, -1.37, -1.36) + TEST_FP_CMP_OP_S( 6, fle.s, 1, -1.37, -1.36) + TEST_FP_CMP_OP_S( 7, flt.s, 1, -1.37, -1.36) + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +RVTEST_DATA_END diff --git a/isa/rv64uf/fcvt.S b/isa/rv64uf/fcvt.S new file mode 100644 index 0000000..bb9a9c4 --- /dev/null +++ b/isa/rv64uf/fcvt.S @@ -0,0 +1,54 @@ +#***************************************************************************** +# fcvt.S +#----------------------------------------------------------------------------- +# +# Test fcvt.{s|d}.{wu|w|lu|l}, fcvt.s.d, and fcvt.d.s instructions. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_INT_FP_OP_S( 2, fcvt.s.w, 2.0, 2); + TEST_INT_FP_OP_S( 3, fcvt.s.w, -2.0, -2); + + TEST_INT_FP_OP_S( 4, fcvt.s.wu, 2.0, 2); + TEST_INT_FP_OP_S( 5, fcvt.s.wu, 4.2949673e9, -2); + + TEST_INT_FP_OP_S( 6, fcvt.s.l, 2.0, 2); + TEST_INT_FP_OP_S( 7, fcvt.s.l, -2.0, -2); + + TEST_INT_FP_OP_S( 8, fcvt.s.lu, 2.0, 2); + TEST_INT_FP_OP_S( 9, fcvt.s.lu, 1.8446744e19, -2); + + TEST_INT_FP_OP_D(12, fcvt.d.w, 2.0, 2); + TEST_INT_FP_OP_D(13, fcvt.d.w, -2.0, -2); + + TEST_INT_FP_OP_D(14, fcvt.d.wu, 2.0, 2); + TEST_INT_FP_OP_D(15, fcvt.d.wu, 4294967294, -2); + + TEST_INT_FP_OP_D(16, fcvt.d.l, 2.0, 2); + TEST_INT_FP_OP_D(17, fcvt.d.l, -2.0, -2); + + TEST_INT_FP_OP_D(18, fcvt.d.lu, 2.0, 2); + TEST_INT_FP_OP_D(19, fcvt.d.lu, 1.8446744073709552e19, -2); + + TEST_FCVT_S_D(20, -1.5, -1.5) + TEST_FCVT_D_S(21, -1.5, -1.5) + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +RVTEST_DATA_END diff --git a/isa/rv64uf/fcvt_w.S b/isa/rv64uf/fcvt_w.S new file mode 100644 index 0000000..e2e1686 --- /dev/null +++ b/isa/rv64uf/fcvt_w.S @@ -0,0 +1,83 @@ +#***************************************************************************** +# fcvt_w.S +#----------------------------------------------------------------------------- +# +# Test fcvt{wu|w|lu|l}.{s|d} instructions. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_FP_INT_OP_S( 2, fcvt.w.s, -1, -1.1, rtz); + TEST_FP_INT_OP_S( 3, fcvt.w.s, -1, -1.0, rtz); + TEST_FP_INT_OP_S( 4, fcvt.w.s, 0, -0.9, rtz); + TEST_FP_INT_OP_S( 5, fcvt.w.s, 0, 0.9, rtz); + TEST_FP_INT_OP_S( 6, fcvt.w.s, 1, 1.0, rtz); + TEST_FP_INT_OP_S( 7, fcvt.w.s, 1, 1.1, rtz); + + TEST_FP_INT_OP_S(12, fcvt.wu.s, -1, -3.0, rtz); # invalid + TEST_FP_INT_OP_S(13, fcvt.wu.s, -1, -1.0, rtz); # invalid + TEST_FP_INT_OP_S(14, fcvt.wu.s, 0, -0.9, rtz); + TEST_FP_INT_OP_S(15, fcvt.wu.s, 0, 0.9, rtz); + TEST_FP_INT_OP_S(16, fcvt.wu.s, 1, 1.0, rtz); + TEST_FP_INT_OP_S(17, fcvt.wu.s, 1, 1.1, rtz); + + TEST_FP_INT_OP_S(22, fcvt.l.s, -1, -1.1, rtz); + TEST_FP_INT_OP_S(23, fcvt.l.s, -1, -1.0, rtz); + TEST_FP_INT_OP_S(24, fcvt.l.s, 0, -0.9, rtz); + TEST_FP_INT_OP_S(25, fcvt.l.s, 0, 0.9, rtz); + TEST_FP_INT_OP_S(26, fcvt.l.s, 1, 1.0, rtz); + TEST_FP_INT_OP_S(27, fcvt.l.s, 1, 1.1, rtz); + + TEST_FP_INT_OP_S(32, fcvt.lu.s, -1, -3.0, rtz); # invalid + TEST_FP_INT_OP_S(33, fcvt.lu.s, -1, -1.0, rtz); # invalid + TEST_FP_INT_OP_S(34, fcvt.lu.s, 0, -0.9, rtz); + TEST_FP_INT_OP_S(35, fcvt.lu.s, 0, 0.9, rtz); + TEST_FP_INT_OP_S(36, fcvt.lu.s, 1, 1.0, rtz); + TEST_FP_INT_OP_S(37, fcvt.lu.s, 1, 1.1, rtz); + + TEST_FP_INT_OP_D(42, fcvt.w.d, -1, -1.1, rtz); + TEST_FP_INT_OP_D(43, fcvt.w.d, -1, -1.0, rtz); + TEST_FP_INT_OP_D(44, fcvt.w.d, 0, -0.9, rtz); + TEST_FP_INT_OP_D(45, fcvt.w.d, 0, 0.9, rtz); + TEST_FP_INT_OP_D(46, fcvt.w.d, 1, 1.0, rtz); + TEST_FP_INT_OP_D(47, fcvt.w.d, 1, 1.1, rtz); + + TEST_FP_INT_OP_D(52, fcvt.wu.d, -1, -3.0, rtz); # invalid + TEST_FP_INT_OP_D(53, fcvt.wu.d, -1, -1.0, rtz); # invalid + TEST_FP_INT_OP_D(54, fcvt.wu.d, 0, -0.9, rtz); + TEST_FP_INT_OP_D(55, fcvt.wu.d, 0, 0.9, rtz); + TEST_FP_INT_OP_D(56, fcvt.wu.d, 1, 1.0, rtz); + TEST_FP_INT_OP_D(57, fcvt.wu.d, 1, 1.1, rtz); + + TEST_FP_INT_OP_D(62, fcvt.l.d, -1, -1.1, rtz); + TEST_FP_INT_OP_D(63, fcvt.l.d, -1, -1.0, rtz); + TEST_FP_INT_OP_D(64, fcvt.l.d, 0, -0.9, rtz); + TEST_FP_INT_OP_D(65, fcvt.l.d, 0, 0.9, rtz); + TEST_FP_INT_OP_D(66, fcvt.l.d, 1, 1.0, rtz); + TEST_FP_INT_OP_D(67, fcvt.l.d, 1, 1.1, rtz); + + TEST_FP_INT_OP_D(72, fcvt.lu.d, -1, -3.0, rtz); # invalid + TEST_FP_INT_OP_D(73, fcvt.lu.d, -1, -1.0, rtz); # invalid + TEST_FP_INT_OP_D(74, fcvt.lu.d, 0, -0.9, rtz); + TEST_FP_INT_OP_D(75, fcvt.lu.d, 0, 0.9, rtz); + TEST_FP_INT_OP_D(76, fcvt.lu.d, 1, 1.0, rtz); + TEST_FP_INT_OP_D(77, fcvt.lu.d, 1, 1.1, rtz); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +RVTEST_DATA_END diff --git a/isa/rv64uf/fmadd.S b/isa/rv64uf/fmadd.S new file mode 100644 index 0000000..76e5e9f --- /dev/null +++ b/isa/rv64uf/fmadd.S @@ -0,0 +1,59 @@ +#***************************************************************************** +# fmadd.S +#----------------------------------------------------------------------------- +# +# Test f[n]m{add|sub}.s and f[n]m{add|sub}.d instructions. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_FP_OP3_S( 2, fmadd.s, 3.5, 1.0, 2.5, 1.0 ); + TEST_FP_OP3_S( 3, fmadd.s, 1236.2, -1.0, -1235.1, 1.1 ); + TEST_FP_OP3_S( 4, fmadd.s, -12.0, 2.0, -5.0, -2.0 ); + + TEST_FP_OP3_D( 5, fmadd.d, 3.5, 1.0, 2.5, 1.0 ); + TEST_FP_OP3_D( 6, fmadd.d, 1236.1999999999999, -1.0, -1235.1, 1.1 ); + TEST_FP_OP3_D( 7, fmadd.d, -12.0, 2.0, -5.0, -2.0 ); + + TEST_FP_OP3_S( 8, fnmadd.s, -3.5, 1.0, 2.5, 1.0 ); + TEST_FP_OP3_S( 9, fnmadd.s, -1236.2, -1.0, -1235.1, 1.1 ); + TEST_FP_OP3_S(10, fnmadd.s, 12.0, 2.0, -5.0, -2.0 ); + + TEST_FP_OP3_D(11, fnmadd.d, -3.5, 1.0, 2.5, 1.0 ); + TEST_FP_OP3_D(12, fnmadd.d, -1236.1999999999999, -1.0, -1235.1, 1.1 ); + TEST_FP_OP3_D(13, fnmadd.d, 12.0, 2.0, -5.0, -2.0 ); + + TEST_FP_OP3_S(14, fmsub.s, 1.5, 1.0, 2.5, 1.0 ); + TEST_FP_OP3_S(15, fmsub.s, 1234, -1.0, -1235.1, 1.1 ); + TEST_FP_OP3_S(16, fmsub.s, -8.0, 2.0, -5.0, -2.0 ); + + TEST_FP_OP3_D(17, fmsub.d, 1.5, 1.0, 2.5, 1.0 ); + TEST_FP_OP3_D(18, fmsub.d, 1234, -1.0, -1235.1, 1.1 ); + TEST_FP_OP3_D(19, fmsub.d, -8.0, 2.0, -5.0, -2.0 ); + + TEST_FP_OP3_S(20, fnmsub.s, -1.5, 1.0, 2.5, 1.0 ); + TEST_FP_OP3_S(21, fnmsub.s, -1234, -1.0, -1235.1, 1.1 ); + TEST_FP_OP3_S(22, fnmsub.s, 8.0, 2.0, -5.0, -2.0 ); + + TEST_FP_OP3_D(23, fnmsub.d, -1.5, 1.0, 2.5, 1.0 ); + TEST_FP_OP3_D(24, fnmsub.d, -1234, -1.0, -1235.1, 1.1 ); + TEST_FP_OP3_D(25, fnmsub.d, 8.0, 2.0, -5.0, -2.0 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +RVTEST_DATA_END diff --git a/isa/rv64uf/fmin.S b/isa/rv64uf/fmin.S new file mode 100644 index 0000000..0041ea5 --- /dev/null +++ b/isa/rv64uf/fmin.S @@ -0,0 +1,55 @@ +#***************************************************************************** +# fmin.S +#----------------------------------------------------------------------------- +# +# Test f{min|max}.{s|d} instructinos. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_FP_OP2_S( 2, fmin.s, 1.0, 2.5, 1.0 ); + TEST_FP_OP2_S( 3, fmin.s, -1235.1, -1235.1, 1.1 ); + TEST_FP_OP2_S( 4, fmin.s, -1235.1, 1.1, -1235.1 ); + TEST_FP_OP2_S( 5, fmin.s, -1235.1, NaN, -1235.1 ); + TEST_FP_OP2_S( 6, fmin.s, 0.00000001, 3.14159265, 0.00000001 ); + TEST_FP_OP2_S( 7, fmin.s, -2.0, -1.0, -2.0 ); + + TEST_FP_OP2_S(12, fmax.s, 2.5, 2.5, 1.0 ); + TEST_FP_OP2_S(13, fmax.s, 1.1, -1235.1, 1.1 ); + TEST_FP_OP2_S(14, fmax.s, 1.1, 1.1, -1235.1 ); + TEST_FP_OP2_S(15, fmax.s, -1235.1, NaN, -1235.1 ); + TEST_FP_OP2_S(16, fmax.s, 3.14159265, 3.14159265, 0.00000001 ); + TEST_FP_OP2_S(17, fmax.s, -1.0, -1.0, -2.0 ); + + TEST_FP_OP2_D(22, fmin.d, 1.0, 2.5, 1.0 ); + TEST_FP_OP2_D(23, fmin.d, -1235.1, -1235.1, 1.1 ); + TEST_FP_OP2_D(24, fmin.d, -1235.1, 1.1, -1235.1 ); + TEST_FP_OP2_D(25, fmin.d, -1235.1, NaN, -1235.1 ); + TEST_FP_OP2_D(26, fmin.d, 0.00000001, 3.14159265, 0.00000001 ); + TEST_FP_OP2_D(27, fmin.d, -2.0, -1.0, -2.0 ); + + TEST_FP_OP2_D(32, fmax.d, 2.5, 2.5, 1.0 ); + TEST_FP_OP2_D(33, fmax.d, 1.1, -1235.1, 1.1 ); + TEST_FP_OP2_D(34, fmax.d, 1.1, 1.1, -1235.1 ); + TEST_FP_OP2_D(35, fmax.d, -1235.1, NaN, -1235.1 ); + TEST_FP_OP2_D(36, fmax.d, 3.14159265, 3.14159265, 0.00000001 ); + TEST_FP_OP2_D(37, fmax.d, -1.0, -1.0, -2.0 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +RVTEST_DATA_END diff --git a/isa/rv64uf/fsgnj.S b/isa/rv64uf/fsgnj.S new file mode 100644 index 0000000..0d2124b --- /dev/null +++ b/isa/rv64uf/fsgnj.S @@ -0,0 +1,57 @@ +#***************************************************************************** +# fsgnj.S +#----------------------------------------------------------------------------- +# +# Test fsgn{j|jn|x}.{s|d} instructions. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_FP_OP2_S( 2, fsgnj.s, -6.3, 6.3, -1.0 ); + TEST_FP_OP2_S( 3, fsgnj.s, 7.3, 7.3, 2.0 ); + TEST_FP_OP2_S( 4, fsgnj.s, -8.3, -8.3, -3.0 ); + TEST_FP_OP2_S( 5, fsgnj.s, 9.3, -9.3, 4.0 ); + + TEST_FP_OP2_S(12, fsgnjn.s, 6.3, 6.3, -1.0 ); + TEST_FP_OP2_S(13, fsgnjn.s, -7.3, 7.3, 2.0 ); + TEST_FP_OP2_S(14, fsgnjn.s, 8.3, -8.3, -3.0 ); + TEST_FP_OP2_S(15, fsgnjn.s, -9.3, -9.3, 4.0 ); + + TEST_FP_OP2_S(22, fsgnjx.s, -6.3, 6.3, -1.0 ); + TEST_FP_OP2_S(23, fsgnjx.s, 7.3, 7.3, 2.0 ); + TEST_FP_OP2_S(24, fsgnjx.s, 8.3, -8.3, -3.0 ); + TEST_FP_OP2_S(25, fsgnjx.s, -9.3, -9.3, 4.0 ); + + TEST_FP_OP2_D(32, fsgnj.d, -6.3, 6.3, -1.0 ); + TEST_FP_OP2_D(33, fsgnj.d, 7.3, 7.3, 2.0 ); + TEST_FP_OP2_D(34, fsgnj.d, -8.3, -8.3, -3.0 ); + TEST_FP_OP2_D(35, fsgnj.d, 9.3, -9.3, 4.0 ); + + TEST_FP_OP2_D(42, fsgnjn.d, 6.3, 6.3, -1.0 ); + TEST_FP_OP2_D(43, fsgnjn.d, -7.3, 7.3, 2.0 ); + TEST_FP_OP2_D(44, fsgnjn.d, 8.3, -8.3, -3.0 ); + TEST_FP_OP2_D(45, fsgnjn.d, -9.3, -9.3, 4.0 ); + + TEST_FP_OP2_D(52, fsgnjx.d, -6.3, 6.3, -1.0 ); + TEST_FP_OP2_D(53, fsgnjx.d, 7.3, 7.3, 2.0 ); + TEST_FP_OP2_D(54, fsgnjx.d, 8.3, -8.3, -3.0 ); + TEST_FP_OP2_D(55, fsgnjx.d, -9.3, -9.3, 4.0 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +RVTEST_DATA_END diff --git a/isa/rv64uf/ldst.S b/isa/rv64uf/ldst.S new file mode 100644 index 0000000..6e4c028 --- /dev/null +++ b/isa/rv64uf/ldst.S @@ -0,0 +1,30 @@ +#***************************************************************************** +# ldst.S +#----------------------------------------------------------------------------- +# +# This test verifies that flw, fld, fsw, and fsd work properly. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + + TEST_CASE(2, a0, 0x4000000040400000, la a1, tdat; flw f1, 4(a1); fsw f1, 12(a1); ld a0, 8(a1)) + TEST_CASE(3, a0, 0x400000003f800000, la a1, tdat; fld f2, 0(a1); fsd f2, 8(a1); ld a0, 8(a1)) + + TEST_PASSFAIL + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +tdat: +.word 0x3f800000 +.word 0x40000000 +.word 0x40400000 +.word 0x40800000 + +RVTEST_DATA_END diff --git a/isa/rv64uf/move.S b/isa/rv64uf/move.S new file mode 100644 index 0000000..f06e324 --- /dev/null +++ b/isa/rv64uf/move.S @@ -0,0 +1,39 @@ +#***************************************************************************** +# move.S +#----------------------------------------------------------------------------- +# +# This test verifies that mxtf.[s,d], mftx.[s,d], mtfsr, mffsr, +# and fsgnj[x|n].[s|d] work properly. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + +li a0, 1 +mtfsr a0 + + TEST_CASE(2, a1, 1, li a0, 0x1234; mtfsr a1, a0) + TEST_CASE(3, a0, 0x34, mffsr a0) + TEST_CASE(4, a0, 0x34, mffsr a0) + + TEST_CASE(5, a0, 0xFFFFFFFFBF812345, li a1, 0xFFFFFFFFBF812345; mxtf.s f0, a1; mftx.s a0, f0) + TEST_CASE(6, a0, 0x3FF02468A0000000, li a1, 0x3FF02468A0000000; mxtf.d f1, a1; mftx.d a0, f1) + + TEST_CASE(7, a0, 0xFFFFFFFFBF812345, li a1, 0xFFFFFFFFBF812345; mxtf.s f0, a1; fsgnj.s f1, f0, f0; mftx.s a0, f1) + TEST_CASE(8, a0, 0x000000004BA98765, li a1, 0xFFFFFFFFCBA98765; mxtf.s f0, a1; fsgnjx.s f1, f0, f0; mftx.s a0, f1) + TEST_CASE(9, a0, 0x000000005EADBEEF, li a1, 0xFFFFFFFFDEADBEEF; mxtf.s f0, a1; fsgnjn.s f1, f0, f0; mftx.s a0, f1) + TEST_CASE(10, a0, 0xBFF02468A0001000, li a1, 0x3FF02468A0001000; li a2, -1; mxtf.d f1, a1; mxtf.d f2, a2; fsgnj.d f0, f1, f2; mftx.d a0, f0) + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +RVTEST_DATA_END diff --git a/isa/rv64uf/structural.S b/isa/rv64uf/structural.S new file mode 100644 index 0000000..0c74ab5 --- /dev/null +++ b/isa/rv64uf/structural.S @@ -0,0 +1,56 @@ +#***************************************************************************** +# structural.S +#----------------------------------------------------------------------------- +# +# This test verifies that the FPU correctly obviates structural hazards on its +# writeback port (e.g. fadd followed by fsgnj) +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + +li x25, 1 + +li x2, 0x3FF0000000000000 +li x1, 0x3F800000 + +#define TEST(nops, errcode) \ + mxtf.d f4, x0 ;\ + mxtf.s f3, x0 ;\ + mxtf.d f2, x2 ;\ + mxtf.s f1, x1 ;\ + b 1f ;\ + .align 5 ;\ +1:fmul.d f4, f2, f2 ;\ + nops ;\ + fsgnj.s f3, f1, f1 ;\ + mftx.d x4, f4 ;\ + mftx.s x3, f3 ;\ + beq x1, x3, 2f ;\ + RVTEST_FAIL ;\ +2:beq x2, x4, 2f ;\ + RVTEST_FAIL; \ +2:mxtf.d f2, zero ;\ + mxtf.s f1, zero ;\ + +TEST(;,2) +TEST(nop,4) +TEST(nop;nop,6) +TEST(nop;nop;nop,8) +TEST(nop;nop;nop;nop,10) +TEST(nop;nop;nop;nop;nop,12) +TEST(nop;nop;nop;nop;nop;nop,14) + +RVTEST_PASS + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +RVTEST_DATA_END -- cgit v1.1