From d649367a1386609da3d10e9e6d388f98781dd35f Mon Sep 17 00:00:00 2001 From: Tim Newsome Date: Fri, 12 Nov 2021 11:29:32 -0800 Subject: Set `riscv resume_order reversed`. (#363) The tests don't confirm that the order actually changes, but at least the code that does the work now is executed during the tests. --- debug/targets/RISC-V/spike-2-hwthread.cfg | 2 ++ 1 file changed, 2 insertions(+) diff --git a/debug/targets/RISC-V/spike-2-hwthread.cfg b/debug/targets/RISC-V/spike-2-hwthread.cfg index c378a45..dc60ced 100644 --- a/debug/targets/RISC-V/spike-2-hwthread.cfg +++ b/debug/targets/RISC-V/spike-2-hwthread.cfg @@ -25,6 +25,8 @@ foreach t [target names] { riscv expose_custom 1,12345-12348 } +riscv resume_order reversed + init set challenge [riscv authdata_read] -- cgit v1.1