| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2017-08-28 | Make the debug tests aware of multicore. | Tim Newsome | 1 | -12/+0 | |
| Targets now contain an array of harts. When running a regular test, one hart is selected to run the test on while the remaining harts are parked in a safe infinite loop. There's currently only one test that tests multicore behavior, but there could be more. The infrastructure should be able to support heterogeneous multicore, but I don't have a target like that to test with. | |||||
| 2016-07-18 | WIP on debug testing. | Tim Newsome | 1 | -0/+12 | |
| ./gdbserver.py --m2gl_m2s --openocd "$HOME/SiFive/openocd/src/openocd -s $HOME/SiFive/openocd/tcl" -- RegsTest.test_write_gprs doesn't fail in a completely crazy way. | |||||
 |
index : riscv-tests.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
| aboutsummaryrefslogtreecommitdiff |