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2023-06-30Merge pull request #483 from riscv-software-src/pylintTim Newsome1-2/+2
2023-06-30Fix for https://github.com/riscv-software-src/riscv-tests/issues/482Tommy Murphy1-2/+2
2023-06-29debug: pylint fix.Tim Newsome1-2/+2
2023-06-29Merge pull request #480 from riscv-software-src/pylintTim Newsome2-4/+24
2023-06-29Merge pull request #479 from riscv-software-src/debug_timeoutTim Newsome1-1/+7
2023-06-29Add --target-timeout to debug test script.Tim Newsome1-1/+7
2023-06-29Merge pull request #478 from Du-Chao/masterTim Newsome1-4/+16
2023-06-27Github workflow to run pylint against debug testsTim Newsome1-0/+17
2023-06-27Pylint fixes.Tim Newsome1-4/+7
2023-06-27Merge pull request #477 from MarekVCodasip/test-exclusionTim Newsome4-1/+52
2023-06-27Add a way to exclude tests by specifying an exclusion fileMarek Vrbka4-1/+52
2023-06-15debug: optimize the FreeRtosTest case.Chao Du1-4/+16
2023-06-13Merge pull request #476 from riscv-software-src/env_argsTim Newsome1-7/+10
2023-06-12Get gcc and gdb path from environment.Tim Newsome1-7/+10
2023-05-26Merge pull request #474 from riscv-software-src/pylintTim Newsome4-24/+34
2023-05-25debug: New pylint => new warnings => new cleanupsTim Newsome4-24/+34
2023-05-22Switch bmarks makefile to rv64gcvJerry Zhao1-1/+1
2023-05-22Add vec-strcmpJerry Zhao3-0/+67
2023-05-22Add vec-sgemmJerry Zhao6-0/+663
2023-05-22Update vec-memcpy commentsJerry Zhao1-1/+1
2023-05-22Add vec-daxpyJerry Zhao5-0/+382
2023-05-22Add vec-memcpy benchmarkJerry Zhao8-14/+412
2023-05-22Enable VS for benchmarksJerry Zhao1-2/+2
2023-05-22Add scalar single-threaded/mt memcpyJerry Zhao7-2/+889
2023-05-22Improve performance of syscalls/memcpyJerry Zhao1-1/+15
2023-05-11Merge pull request #470 from riscv-software-src/pylintTim Newsome2-61/+8
2023-05-10New pylint, so make everything clean again.Tim Newsome2-61/+8
2023-05-03Merge pull request #469 from riscv-software-src/openocd_cfgTim Newsome7-34/+34
2023-05-01Update OpenOCD cfg files to new syntaxTim Newsome7-34/+34
2023-04-06Augment LR/SC test to test that SC-after-failed-SC failsAndrew Waterman1-2/+5
2023-04-06Merge pull request #466 from riscv-software-src/spike-zicntrAndrew Waterman1-2/+2
2023-04-06Merge pull request #464 from nervosnetwork/amocmp_wAndrew Waterman4-1/+40
2023-04-06Include Zicntr in Spike ISA stringAndrew Waterman1-2/+2
2023-04-06Add more tests for amomax/maxu/min/minu_wmohanson4-1/+40
2023-03-16Bump env to cope with Smrnmi extensionAndrew Waterman1-0/+0
2023-03-16Fix breakpoint.S failing when tcontrol is implemented (#463)Luke Wren1-0/+10
2023-03-03bump envAndrew Waterman1-0/+0
2023-03-02Merge pull request #461 from riscv-software-src/icount_fixTim Newsome1-1/+1
2023-03-01Fix intermittent IcountTest failure on multi hart.Tim Newsome1-1/+1
2023-02-28Merge pull request #458 from Du-Chao/masterTim Newsome1-2/+2
2023-02-28Merge pull request #456 from riscv-software-src/icountTim Newsome1-0/+27
2023-02-27rv32ui test misaligned load/store data (#459)Jesse Taube3-5/+9
2023-02-21debug: fix pylint error W0621 redefined-outer-nameChao Du1-2/+2
2023-02-16Add test for icount triggers.Tim Newsome1-0/+27
2023-02-15Merge pull request #451 from riscv-software-src/etrigger_fixTim Newsome1-0/+1
2023-02-13Fix ma_fetch test for norvc (#454)Yujia Qiao1-1/+1
2023-02-13Update register name to satp (#455)Pascal Cotret1-1/+1
2023-02-03env: update commit hash for submodule env (#452)deepak04141-0/+0
2023-02-02Fix EtriggerTest on multi-hart targets.Tim Newsome1-0/+1
2023-01-19Fix ma_fetch test for writable misa.C (#449)Jerry Zhao1-3/+3
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