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-rw-r--r--isa/rv64si/csr.S24
-rw-r--r--isa/rv64si/ma_fetch.S1
-rw-r--r--isa/rv64si/sbreak.S1
-rw-r--r--isa/rv64si/scall.S4
4 files changed, 13 insertions, 17 deletions
diff --git a/isa/rv64si/csr.S b/isa/rv64si/csr.S
index d0c6724..35fc99a 100644
--- a/isa/rv64si/csr.S
+++ b/isa/rv64si/csr.S
@@ -18,6 +18,7 @@ RVTEST_CODE_BEGIN
#define sstatus mstatus
#define scause mcause
#define sepc mepc
+ #define sret mret
#define stvec_handler mtvec_handler
#undef SSTATUS_SPP
#define SSTATUS_SPP MSTATUS_MPP
@@ -55,24 +56,24 @@ RVTEST_CODE_BEGIN
TEST_CASE(11, x0, 0, nop)
#endif
- # Exit by doing a syscall.
- TEST_CASE(12, x0, 1, scall)
+ RVTEST_PASS
# We should only fall through to this if scall failed.
TEST_PASSFAIL
stvec_handler:
- # Trapping on tests 11 and 12 is usually good news.
+ # Trapping on tests 10 and 11 is good news.
# Note that since the test didn't complete, TESTNUM is smaller by 1.
li t0, 9
beq TESTNUM, t0, privileged
li t0, 10
beq TESTNUM, t0, privileged
- li t0, 11
- beq TESTNUM, t0, syscall
- # Trapping on other tests is bad news.
- j fail
+ # catch RVTEST_PASS and kick it up to M-mode
+ csrr t0, scause
+ li t1, CAUSE_USER_ECALL
+ bne t0, t1, fail
+ RVTEST_PASS
privileged:
# Make sure scause indicates a lack of privilege.
@@ -85,15 +86,6 @@ privileged:
csrw sepc, t0
sret
-syscall:
- # Make sure scause indicates a syscall.
- csrr t0, scause
- li t1, CAUSE_USER_ECALL
- bne t0, t1, fail
-
- # We're done.
- j pass
-
RVTEST_CODE_END
.data
diff --git a/isa/rv64si/ma_fetch.S b/isa/rv64si/ma_fetch.S
index db702d9..a97eecb 100644
--- a/isa/rv64si/ma_fetch.S
+++ b/isa/rv64si/ma_fetch.S
@@ -18,6 +18,7 @@ RVTEST_CODE_BEGIN
#define sstatus mstatus
#define scause mcause
#define sepc mepc
+ #define sret mret
#define stvec_handler mtvec_handler
#endif
diff --git a/isa/rv64si/sbreak.S b/isa/rv64si/sbreak.S
index bf38434..99240be 100644
--- a/isa/rv64si/sbreak.S
+++ b/isa/rv64si/sbreak.S
@@ -18,6 +18,7 @@ RVTEST_CODE_BEGIN
#define sstatus mstatus
#define scause mcause
#define sepc mepc
+ #define sret mret
#define stvec_handler mtvec_handler
#endif
diff --git a/isa/rv64si/scall.S b/isa/rv64si/scall.S
index 703de0b..f4752d1 100644
--- a/isa/rv64si/scall.S
+++ b/isa/rv64si/scall.S
@@ -18,6 +18,7 @@ RVTEST_CODE_BEGIN
#define sstatus mstatus
#define scause mcause
#define sepc mepc
+ #define sret mret
#define stvec_handler mtvec_handler
#undef SSTATUS_SPP
#define SSTATUS_SPP MSTATUS_MPP
@@ -29,9 +30,10 @@ RVTEST_CODE_BEGIN
csrc sstatus, t0
la t0, 1f
csrw sepc, t0
- eret
+ sret
1:
+ li TESTNUM, 1
scall
j fail