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-rw-r--r--debug/targets/RISC-V/spike64-2-hwthread.py1
1 files changed, 1 insertions, 0 deletions
diff --git a/debug/targets/RISC-V/spike64-2-hwthread.py b/debug/targets/RISC-V/spike64-2-hwthread.py
index 1ac184a..d1d2bf7 100644
--- a/debug/targets/RISC-V/spike64-2-hwthread.py
+++ b/debug/targets/RISC-V/spike64-2-hwthread.py
@@ -13,6 +13,7 @@ class spike64_2(targets.Target):
implements_custom_test = True
support_hasel = False
support_memory_sampling = False # Needs SBA
+ support_unavailable_control = True
def create(self):
return testlib.Spike(self, isa="RV64IMAFDV", abstract_rti=30,