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author | Andrew Waterman <waterman@cs.berkeley.edu> | 2014-12-03 17:48:17 -0800 |
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committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2014-12-03 17:48:17 -0800 |
commit | edc9979273352afaa3e0a3dd2a2495d60e2a9a1e (patch) | |
tree | 552fe779ffe011d5dcdcafed4b11d020c1cb9f97 /isa | |
parent | bba63543865e3edf1fd739164ea46dd3059f2240 (diff) | |
download | riscv-tests-edc9979273352afaa3e0a3dd2a2495d60e2a9a1e.zip riscv-tests-edc9979273352afaa3e0a3dd2a2495d60e2a9a1e.tar.gz riscv-tests-edc9979273352afaa3e0a3dd2a2495d60e2a9a1e.tar.bz2 |
Rely on assembler to relax far branches
Diffstat (limited to 'isa')
-rw-r--r-- | isa/macros/scalar/test_macros.h | 15 |
1 files changed, 3 insertions, 12 deletions
diff --git a/isa/macros/scalar/test_macros.h b/isa/macros/scalar/test_macros.h index 5250a19..5b2b8e5 100644 --- a/isa/macros/scalar/test_macros.h +++ b/isa/macros/scalar/test_macros.h @@ -13,15 +13,6 @@ test_ ## testnum: \ li TESTNUM, testnum; \ bne testreg, x29, fail; -#define TEST_CASE_JUMP( testnum, testreg, correctval, code... ) \ -test_ ## testnum: \ - code; \ - li x29, correctval; \ - li TESTNUM, testnum; \ - beq testreg, x29, pass_ ## testnum; \ - j fail; \ -pass_ ## testnum: \ - # We use a macro hack to simpify code generation for various numbers # of bubble cycles. @@ -99,7 +90,7 @@ pass_ ## testnum: \ #----------------------------------------------------------------------- #define TEST_VSETCFGIVL( testnum, nxpr, nfpr, bank, vl, result ) \ - TEST_CASE_JUMP( testnum, x1, result, \ + TEST_CASE( testnum, x1, result, \ li x1, (bank << 12); \ vsetcfg x1,nxpr,nfpr; \ li x1, vl; \ @@ -107,7 +98,7 @@ pass_ ## testnum: \ ) #define TEST_VVCFG( testnum, nxpr, nfpr, bank, vl, result ) \ - TEST_CASE_JUMP( testnum, x1, result, \ + TEST_CASE( testnum, x1, result, \ li x1, (bank << 12) | (nfpr << 6) | nxpr; \ vsetcfg x1; \ li x1, vl; \ @@ -115,7 +106,7 @@ pass_ ## testnum: \ ) #define TEST_VSETVL( testnum, nxpr, nfpr, bank, vl, result ) \ - TEST_CASE_JUMP( testnum, x1, result, \ + TEST_CASE( testnum, x1, result, \ li x1, (bank << 12); \ vsetcfg x1,nxpr,nfpr; \ li x1, vl; \ |