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| author | Takahiro <hogehoge@gachapin.jp> | 2020-03-18 07:28:59 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-03-18 07:28:59 -0700 |
| commit | f04e824143c43b42b740f66c5d2a60b3fc627b9b (patch) | |
| tree | 9991fd161f29d29f0b3b38292bd46b9888cbcee1 /isa | |
| parent | b59b7b8417e36894caa1d4c64265ff4c74fa2738 (diff) | |
| download | riscv-tests-f04e824143c43b42b740f66c5d2a60b3fc627b9b.zip riscv-tests-f04e824143c43b42b740f66c5d2a60b3fc627b9b.tar.gz riscv-tests-f04e824143c43b42b740f66c5d2a60b3fc627b9b.tar.bz2 | |
Fix shamt.S header (#264)
Diffstat (limited to 'isa')
| -rw-r--r-- | isa/rv32mi/shamt.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/isa/rv32mi/shamt.S b/isa/rv32mi/shamt.S index c13bc3f..622fde4 100644 --- a/isa/rv32mi/shamt.S +++ b/isa/rv32mi/shamt.S @@ -1,10 +1,10 @@ # See LICENSE for license details. #***************************************************************************** -# csr.S +# shamt.S #----------------------------------------------------------------------------- # -# Test CSRRx and CSRRxI instructions. +# Test illegal shamt[5] of shift instruction in 32-bit ISA. # #include "riscv_test.h" |