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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-07-11 17:41:59 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-07-11 17:41:59 -0700 |
| commit | a5b7f805c111e14a1478153147a57283a0b9e45d (patch) | |
| tree | 5da82ce6cae37a6f685996b3e36ecd6401d82fb0 /isa/rv64ui | |
| parent | 3dc00e7b04834f862a074ac8822892e1ecfc009c (diff) | |
| download | riscv-tests-a5b7f805c111e14a1478153147a57283a0b9e45d.zip riscv-tests-a5b7f805c111e14a1478153147a57283a0b9e45d.tar.gz riscv-tests-a5b7f805c111e14a1478153147a57283a0b9e45d.tar.bz2 | |
Remove vestigial j instruction test; improve jal test
Diffstat (limited to 'isa/rv64ui')
| -rw-r--r-- | isa/rv64ui/Makefrag | 2 | ||||
| -rw-r--r-- | isa/rv64ui/j.S | 49 | ||||
| -rw-r--r-- | isa/rv64ui/jal.S | 23 |
3 files changed, 12 insertions, 62 deletions
diff --git a/isa/rv64ui/Makefrag b/isa/rv64ui/Makefrag index 7920b99..aeeb560 100644 --- a/isa/rv64ui/Makefrag +++ b/isa/rv64ui/Makefrag @@ -9,7 +9,7 @@ rv64ui_sc_tests = \ beq bge bgeu blt bltu bne \ example simple \ fence_i \ - j jal jalr \ + jal jalr \ lb lbu lh lhu lw lwu ld \ lui \ or ori \ diff --git a/isa/rv64ui/j.S b/isa/rv64ui/j.S deleted file mode 100644 index a7e3fe6..0000000 --- a/isa/rv64ui/j.S +++ /dev/null @@ -1,49 +0,0 @@ -# See LICENSE for license details. - -#***************************************************************************** -# j.S -#----------------------------------------------------------------------------- -# -# Test j instruction. -# - -#include "riscv_test.h" -#include "test_macros.h" - -RVTEST_RV64U -RVTEST_CODE_BEGIN - - #------------------------------------------------------------- - # Test basic - #------------------------------------------------------------- - - li TESTNUM, 2; - j test_2; - j fail; -test_2: - - #------------------------------------------------------------- - # Test delay slot instructions not executed nor bypassed - #------------------------------------------------------------- - - TEST_CASE( 3, x1, 3, \ - li x1, 1; \ - j 1f; \ - addi x1, x1, 1; \ - addi x1, x1, 1; \ - addi x1, x1, 1; \ - addi x1, x1, 1; \ -1: addi x1, x1, 1; \ - addi x1, x1, 1; \ - ) - - TEST_PASSFAIL - -RVTEST_CODE_END - - .data -RVTEST_DATA_BEGIN - - TEST_DATA - -RVTEST_DATA_END diff --git a/isa/rv64ui/jal.S b/isa/rv64ui/jal.S index 90d06e9..f7f299d 100644 --- a/isa/rv64ui/jal.S +++ b/isa/rv64ui/jal.S @@ -21,8 +21,8 @@ test_2: li TESTNUM, 2 li ra, 0 + jal x3, target_2 linkaddr_2: - jal target_2 nop nop @@ -30,22 +30,21 @@ linkaddr_2: target_2: la x2, linkaddr_2 - addi x2, x2, 4 - bne x2, ra, fail + bne x2, x3, fail #------------------------------------------------------------- # Test delay slot instructions not executed nor bypassed #------------------------------------------------------------- - TEST_CASE( 3, x2, 3, \ - li x2, 1; \ - jal 1f; \ - addi x2, x2, 1; \ - addi x2, x2, 1; \ - addi x2, x2, 1; \ - addi x2, x2, 1; \ -1: addi x2, x2, 1; \ - addi x2, x2, 1; \ + TEST_CASE( 3, ra, 3, \ + li ra, 1; \ + jal x0, 1f; \ + addi ra, ra, 1; \ + addi ra, ra, 1; \ + addi ra, ra, 1; \ + addi ra, ra, 1; \ +1: addi ra, ra, 1; \ + addi ra, ra, 1; \ ) TEST_PASSFAIL |