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author | Andrew Waterman <andrew@sifive.com> | 2017-03-21 16:46:43 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2017-03-21 16:46:43 -0700 |
commit | 96ef658f1fce0f1b4cce468ad7fa3ff453b9ebac (patch) | |
tree | ef6d18dbf4119755c469ed90948839ac6af28bbf /isa/rv64ui/jal.S | |
parent | 33a1beb24e65c32aa8e2f2547da27eb3e24c4cc9 (diff) | |
download | riscv-tests-96ef658f1fce0f1b4cce468ad7fa3ff453b9ebac.zip riscv-tests-96ef658f1fce0f1b4cce468ad7fa3ff453b9ebac.tar.gz riscv-tests-96ef658f1fce0f1b4cce468ad7fa3ff453b9ebac.tar.bz2 |
Avoid x3 (gp), which is now TESTNUM
Diffstat (limited to 'isa/rv64ui/jal.S')
-rw-r--r-- | isa/rv64ui/jal.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/isa/rv64ui/jal.S b/isa/rv64ui/jal.S index f7f299d..00c65d8 100644 --- a/isa/rv64ui/jal.S +++ b/isa/rv64ui/jal.S @@ -21,7 +21,7 @@ test_2: li TESTNUM, 2 li ra, 0 - jal x3, target_2 + jal x4, target_2 linkaddr_2: nop nop @@ -30,7 +30,7 @@ linkaddr_2: target_2: la x2, linkaddr_2 - bne x2, x3, fail + bne x2, x4, fail #------------------------------------------------------------- # Test delay slot instructions not executed nor bypassed |