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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-04-30 20:45:27 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-04-30 20:45:27 -0700 |
| commit | 22742246287feda0be2666ba14ca6f4a6bc73bb2 (patch) | |
| tree | a15d7df63f796e13e6c28a2ec82a36f68af5c3a5 /isa/macros | |
| parent | 8dda7b2034197109a2387ac3dd03c7ad1e8c0b65 (diff) | |
| download | riscv-tests-22742246287feda0be2666ba14ca6f4a6bc73bb2.zip riscv-tests-22742246287feda0be2666ba14ca6f4a6bc73bb2.tar.gz riscv-tests-22742246287feda0be2666ba14ca6f4a6bc73bb2.tar.bz2 | |
ERET -> xRET; new memory map
For now, we no longer build hex files, because the programs don't
start at address 0. This decision will likely be revisited.
Diffstat (limited to 'isa/macros')
| -rw-r--r-- | isa/macros/vector/test_macros.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/isa/macros/vector/test_macros.h b/isa/macros/vector/test_macros.h index a97ffe7..7ee9262 100644 --- a/isa/macros/vector/test_macros.h +++ b/isa/macros/vector/test_macros.h @@ -20,8 +20,8 @@ test_ ## testnum: \ vsetcfg nxreg,nfreg; \ li a3,2048; \ vsetvl a3,a3; \ - lui a0,%hi(vtcode ## testnum ); \ - vf %lo(vtcode ## testnum )(a0); \ +1:auipc a0,%pcrel_hi(vtcode ## testnum); \ + vf %pcrel_lo(1b)(a0); \ la a4,dst; \ vsd v ## testreg, a4; \ fence; \ @@ -233,8 +233,8 @@ test_ ## testnum: \ addi a5,a5,4; \ vflstw vf2, a5, x0; \ addi a5,a5,4; \ - lui a0,%hi(vtcode ## testnum ); \ - vf %lo(vtcode ## testnum )(a0); \ +1:auipc a0,%pcrel_hi(vtcode ## testnum); \ + vf %pcrel_lo(1b)(a0); \ la a4,dst; \ vsw vx1, a4; \ fence; \ @@ -273,8 +273,8 @@ test_ ## testnum: \ addi a5,a5,8; \ vflstd vf2, a5, x0; \ addi a5,a5,8; \ - lui a0,%hi(vtcode ## testnum ); \ - vf %lo(vtcode ## testnum )(a0); \ +1:auipc a0,%pcrel_hi(vtcode ## testnum); \ + vf %pcrel_lo(1b)(a0); \ la a4,dst; \ vsd vx1, a4; \ fence; \ @@ -346,8 +346,8 @@ test_ ## testnum: \ vsetcfg 2,1; \ li a3,2048; \ vsetvl a3,a3; \ - lui a0,%hi(vtcode ## testnum ); \ - vf %lo(vtcode ## testnum )(a0); \ +1:auipc a0,%pcrel_hi(vtcode ## testnum); \ + vf %pcrel_lo(1b)(a0); \ la a4,dst; \ vsw vx1, a4; \ fence; \ @@ -379,8 +379,8 @@ test_ ## testnum: \ vsetcfg 2,1; \ li a3,2048; \ vsetvl a3,a3; \ - lui a0,%hi(vtcode ## testnum ); \ - vf %lo(vtcode ## testnum )(a0); \ +1:auipc a0,%pcrel_hi(vtcode ## testnum); \ + vf %pcrel_lo(1b)(a0); \ la a4,dst; \ vsd vx1, a4; \ fence; \ @@ -529,8 +529,8 @@ test_ ## testnum: \ vsetcfg nxreg,nfreg; \ li a3,2048; \ vsetvl a3,a3; \ - lui a0,%hi(vtcode ## testnum ); \ - vf %lo(vtcode ## testnum )(a0); \ +1:auipc a0,%pcrel_hi(vtcode ## testnum); \ + vf %pcrel_lo(1b)(a0); \ la a4,dst; \ fence; \ li a1,correctval; \ |