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| author | Carsten Gosvig <40368726+cgsfv@users.noreply.github.com> | 2018-11-14 21:34:24 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-11-14 21:34:24 +0100 |
| commit | 4dc6acb33b4b8ebf1caa3e19c006ebc41f548d85 (patch) | |
| tree | 1ced7457d28e04c8d83f4814d9e286d1a78135ff /debug/targets/SiFive/Freedom/U500.py | |
| parent | ee6c720e4db50b73dd8f45c70a6868b88cd4a8b1 (diff) | |
| parent | 8a46e6b0064239805855ea9519b327fdb61c4203 (diff) | |
| download | riscv-tests-4dc6acb33b4b8ebf1caa3e19c006ebc41f548d85.zip riscv-tests-4dc6acb33b4b8ebf1caa3e19c006ebc41f548d85.tar.gz riscv-tests-4dc6acb33b4b8ebf1caa3e19c006ebc41f548d85.tar.bz2 | |
Merge pull request #169 from riscv/eclipse_memory_read
Added MemTestBlockReadInvalid verifying the corresponding OpenOCD fix
Diffstat (limited to 'debug/targets/SiFive/Freedom/U500.py')
| -rw-r--r-- | debug/targets/SiFive/Freedom/U500.py | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/debug/targets/SiFive/Freedom/U500.py b/debug/targets/SiFive/Freedom/U500.py index 6da3ac5..4442af7 100644 --- a/debug/targets/SiFive/Freedom/U500.py +++ b/debug/targets/SiFive/Freedom/U500.py @@ -3,10 +3,11 @@ import targets class U500Hart(targets.Hart): xlen = 64 ram = 0x80000000 - ram_size = 16 * 1024 + ram_size = 64 * 1024 instruction_hardware_breakpoint_count = 2 link_script_path = "Freedom.lds" class U500(targets.Target): openocd_config_path = "Freedom.cfg" harts = [U500Hart()] + invalid_memory_returns_zero = True |