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author | Megan Wachs <megan@sifive.com> | 2017-04-14 07:56:32 -0700 |
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committer | Megan Wachs <megan@sifive.com> | 2017-04-14 07:56:32 -0700 |
commit | 69b1dda5d9b184ff39d4e9c134f66a5bfe5bcef6 (patch) | |
tree | 9398eab417872e107e6a1aaf9bfeeef1183036bc /debug/targets.py | |
parent | 2f4a65844606861aa2aec43db9a49997d0e02a5f (diff) | |
download | riscv-tests-69b1dda5d9b184ff39d4e9c134f66a5bfe5bcef6.zip riscv-tests-69b1dda5d9b184ff39d4e9c134f66a5bfe5bcef6.tar.gz riscv-tests-69b1dda5d9b184ff39d4e9c134f66a5bfe5bcef6.tar.bz2 |
debug: working with newprogram branch
Diffstat (limited to 'debug/targets.py')
-rw-r--r-- | debug/targets.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/debug/targets.py b/debug/targets.py index 52b623c..043652c 100644 --- a/debug/targets.py +++ b/debug/targets.py @@ -99,7 +99,7 @@ class HiFive1Target(FreedomE300Target): class FreedomE300SimTarget(Target): name = "freedom-e300-sim" xlen = 32 - timeout_sec = 240 + timeout_sec = 6000 ram = 0x80000000 ram_size = 256 * 1024 * 1024 instruction_hardware_breakpoint_count = 2 @@ -119,7 +119,7 @@ class FreedomU500Target(Target): class FreedomU500SimTarget(Target): name = "freedom-u500-sim" xlen = 64 - timeout_sec = 240 + timeout_sec = 6000 ram = 0x80000000 ram_size = 256 * 1024 * 1024 instruction_hardware_breakpoint_count = 2 |