WIP on debug testing.

./gdbserver.py --m2gl_m2s --openocd "$HOME/SiFive/openocd/src/openocd -s
$HOME/SiFive/openocd/tcl" -- RegsTest.test_write_gprs
doesn't fail in a completely crazy way.

6 files changed, 181 insertions, 0 deletions

diff --git a/debug/programs/checksum.c b/debug/programs/checksum.c
new file mode 100644
index 0000000..36152fc
--- /dev/null
+++ b/debug/programs/checksum.c
@@ -0,0 +1,47 @@
+#include <stdint.h>
+
+// CRC code from http://www.hackersdelight.org/hdcodetxt/crc.c.txt
+
+// Reverses (reflects) bits in a 32-bit word.
+unsigned reverse(unsigned x) {
+   x = ((x & 0x55555555) <<  1) | ((x >>  1) & 0x55555555);
+   x = ((x & 0x33333333) <<  2) | ((x >>  2) & 0x33333333);
+   x = ((x & 0x0F0F0F0F) <<  4) | ((x >>  4) & 0x0F0F0F0F);
+   x = (x << 24) | ((x & 0xFF00) << 8) |
+       ((x >> 8) & 0xFF00) | (x >> 24);
+   return x;
+}
+
+// ----------------------------- crc32a --------------------------------
+
+/* This is the basic CRC algorithm with no optimizations. It follows the
+logic circuit as closely as possible. */
+
+unsigned int crc32a(uint8_t *message, unsigned int size) {
+   int i, j;
+   unsigned int byte, crc;
+
+   i = 0;
+   crc = 0xFFFFFFFF;
+   while (i < size) {
+      byte = message[i];            // Get next byte.
+      byte = reverse(byte);         // 32-bit reversal.
+      for (j = 0; j <= 7; j++) {    // Do eight times.
+         if ((int)(crc ^ byte) < 0)
+              crc = (crc << 1) ^ 0x04C11DB7;
+         else crc = crc << 1;
+         byte = byte << 1;          // Ready next msg bit.
+      }
+      i = i + 1;
+   }
+   return reverse(~crc);
+}
+
+extern uint8_t *data;
+extern uint32_t length;
+
+uint32_t main()
+{
+  /* Compute a simple checksum. */
+  return crc32a(data, length);
+}
diff --git a/debug/programs/debug.c b/debug/programs/debug.c
new file mode 100644
index 0000000..2cad88f
--- /dev/null
+++ b/debug/programs/debug.c
@@ -0,0 +1,27 @@
+#include <stdio.h>
+
+char c = 'x';
+
+void print_row(int length)
+{
+    for (int x=0; x<length; x++) {
+        printf("%c", c);
+    }
+    printf("\n");
+}
+
+int main()
+{
+    volatile int i = 42;
+    const char *text = "constant\n";
+    int threshold = 7;
+
+    // Wait for the debugger to get us out of this loop.
+    while (i)
+        ;
+
+    printf("%s", text);
+    for (int y=0; y < 10; y++) {
+        print_row(y);
+    }
+}
diff --git a/debug/programs/init.c b/debug/programs/init.c
new file mode 100644
index 0000000..074bc21
--- /dev/null
+++ b/debug/programs/init.c
@@ -0,0 +1,14 @@
+int main(void);
+
+void handle_trap(unsigned int mcause, unsigned int mepc, unsigned int sp)
+{
+    while (1)
+        ;
+}
+
+void _init()
+{
+    main();
+    while (1)
+        ;
+}
diff --git a/debug/programs/mprv.S b/debug/programs/mprv.S
new file mode 100644
index 0000000..df346b3
--- /dev/null
+++ b/debug/programs/mprv.S
@@ -0,0 +1,38 @@
+#include "../riscv/encoding.h"
+#define PGSHIFT         12
+
+        .global         _start
+
+        .section        .text
+_start:
+        # Set up a page table entry that maps 0x0... to 0x8...
+        la      t0, page_table
+        srli    t0, t0, PGSHIFT
+        csrw    CSR_SPTBR, t0
+
+        # update mstatus
+        csrr    t1, CSR_MSTATUS
+        li      t0, (MSTATUS_MPRV | (VM_SV39 << 24))
+        #li      t0, ((VM_SV39 << 24))
+        or      t1, t0, t1
+        csrw    CSR_MSTATUS, t1
+
+        la      t0, (loop - 0x80000000)
+        csrw    CSR_MEPC, t0
+
+        # Exit supervisor mode, entering user mode at loop.
+        mret
+
+loop:
+        la      t0, data
+        lw      t1, 0(t0)
+        j       loop
+
+        .section        .data
+data:
+        .word   0xbead
+
+        .balign 0x1000
+page_table:
+        .word   ((0x80000000 >> 2) | PTE_V | PTE_TYPE_URWX_SRWX)
+        .word   0
diff --git a/debug/programs/regs.S b/debug/programs/regs.S
new file mode 100644
index 0000000..e6456e1
--- /dev/null
+++ b/debug/programs/regs.S
@@ -0,0 +1,43 @@
+        .global main
+main:
+        j       main
+
+write_regs:
+        sd      x1, 0(a0)
+        sd      x2, 8(a0)
+        sd      x3, 16(a0)
+        sd      x4, 24(a0)
+        sd      x5, 32(a0)
+        sd      x6, 40(a0)
+        sd      x7, 48(a0)
+        sd      x8, 56(a0)
+        sd      x9, 64(a0)
+        sd      x11, 72(a0)
+        sd      x12, 80(a0)
+        sd      x13, 88(a0)
+        sd      x14, 96(a0)
+        sd      x15, 104(a0)
+        sd      x16, 112(a0)
+        sd      x17, 120(a0)
+        sd      x18, 128(a0)
+        sd      x19, 136(a0)
+        sd      x20, 144(a0)
+        sd      x21, 152(a0)
+        sd      x22, 160(a0)
+        sd      x23, 168(a0)
+        sd      x24, 176(a0)
+        sd      x25, 184(a0)
+        sd      x26, 192(a0)
+        sd      x27, 200(a0)
+        sd      x28, 208(a0)
+        sd      x29, 216(a0)
+        sd      x30, 224(a0)
+        sd      x31, 232(a0)
+
+        csrr    x1, 1   # fflags
+
+all_done:
+        j       all_done
+
+data:
+        .fill   64, 8, 0
diff --git a/debug/programs/start.S b/debug/programs/start.S
new file mode 100644
index 0000000..76c37bb
--- /dev/null
+++ b/debug/programs/start.S
@@ -0,0 +1,12 @@
+        .global         _start
+
+_start:
+        la      sp, stack_end
+        jal     main
+done:
+        j       done
+
+        .data
+stack:
+        .fill   4096, 1, 0
+stack_end: