Made some progress towards working with spike.

I'm writing all the tests so they should just work on real hardware,
too.

4 files changed, 85 insertions, 55 deletions

diff --git a/debug/programs/checksum.c b/debug/programs/checksum.c
index 36152fc..e076f8a 100644
--- a/debug/programs/checksum.c
+++ b/debug/programs/checksum.c
@@ -36,12 +36,3 @@ unsigned int crc32a(uint8_t *message, unsigned int size) {
    }
    return reverse(~crc);
 }
-
-extern uint8_t *data;
-extern uint32_t length;
-
-uint32_t main()
-{
-  /* Compute a simple checksum. */
-  return crc32a(data, length);
-}
diff --git a/debug/programs/debug.c b/debug/programs/debug.c
index 2cad88f..afca484 100644
--- a/debug/programs/debug.c
+++ b/debug/programs/debug.c
@@ -1,27 +1,46 @@
 #include <stdio.h>
+#include <string.h>
+#include <stdint.h>
 
-char c = 'x';
+unsigned int crc32a(uint8_t *message, unsigned int size);
 
-void print_row(int length)
+void rot13(char *buf)
 {
-    for (int x=0; x<length; x++) {
-        printf("%c", c);
+    while (*buf) {
+        if ((*buf >= 'a' && *buf <= 'm') ||
+                (*buf >= 'A' && *buf <= 'M')) {
+            *buf += 13;
+        } else if ((*buf >= 'n' && *buf <= 'z') ||
+                (*buf >= 'N' && *buf <= 'Z')) {
+            *buf -= 13;
+        }
+        buf++;
     }
-    printf("\n");
+}
+
+size_t strlen(const char *buf)
+{
+    int len = 0;
+    while (buf[len])
+        len++;
+    return len;
 }
 
 int main()
 {
-    volatile int i = 42;
-    const char *text = "constant\n";
-    int threshold = 7;
+    volatile int i = 0;
+    int j = 0;
+    char *fox = "The quick brown fox jumps of the lazy dog.";
+    unsigned int checksum = 0;
 
-    // Wait for the debugger to get us out of this loop.
+start:
     while (i)
-        ;
+        j++;
 
-    printf("%s", text);
-    for (int y=0; y < 10; y++) {
-        print_row(y);
-    }
+    rot13(fox);
+    checksum ^= crc32a(fox, strlen(fox));
+    rot13(fox);
+    checksum ^= crc32a(fox, strlen(fox));
+
+    return checksum;
 }
diff --git a/debug/programs/init.c b/debug/programs/init.c
index 074bc21..a2b41b0 100644
--- a/debug/programs/init.c
+++ b/debug/programs/init.c
@@ -6,9 +6,19 @@ void handle_trap(unsigned int mcause, unsigned int mepc, unsigned int sp)
         ;
 }
 
-void _init()
+void _exit(int status)
 {
-    main();
+    // Make sure gcc doesn't inline _exit, so we can actually set a breakpoint
+    // on it.
+    volatile int i = 42;
+    while (i)
+        ;
+    // _exit isn't supposed to return.
     while (1)
         ;
 }
+
+void _init()
+{
+    _exit(main());
+}
diff --git a/debug/programs/regs.S b/debug/programs/regs.S
index e6456e1..54b3961 100644
--- a/debug/programs/regs.S
+++ b/debug/programs/regs.S
@@ -1,38 +1,48 @@
+#ifdef __riscv64
+# define LREG ld
+# define SREG sd
+# define REGBYTES 8
+#else
+# define LREG lw
+# define SREG sw
+# define REGBYTES 4
+#endif
+
         .global main
 main:
         j       main
 
 write_regs:
-        sd      x1, 0(a0)
-        sd      x2, 8(a0)
-        sd      x3, 16(a0)
-        sd      x4, 24(a0)
-        sd      x5, 32(a0)
-        sd      x6, 40(a0)
-        sd      x7, 48(a0)
-        sd      x8, 56(a0)
-        sd      x9, 64(a0)
-        sd      x11, 72(a0)
-        sd      x12, 80(a0)
-        sd      x13, 88(a0)
-        sd      x14, 96(a0)
-        sd      x15, 104(a0)
-        sd      x16, 112(a0)
-        sd      x17, 120(a0)
-        sd      x18, 128(a0)
-        sd      x19, 136(a0)
-        sd      x20, 144(a0)
-        sd      x21, 152(a0)
-        sd      x22, 160(a0)
-        sd      x23, 168(a0)
-        sd      x24, 176(a0)
-        sd      x25, 184(a0)
-        sd      x26, 192(a0)
-        sd      x27, 200(a0)
-        sd      x28, 208(a0)
-        sd      x29, 216(a0)
-        sd      x30, 224(a0)
-        sd      x31, 232(a0)
+        SREG    x1, 0(a0)
+        SREG    x2, 8(a0)
+        SREG    x3, 16(a0)
+        SREG    x4, 24(a0)
+        SREG    x5, 32(a0)
+        SREG    x6, 40(a0)
+        SREG    x7, 48(a0)
+        SREG    x8, 56(a0)
+        SREG    x9, 64(a0)
+        SREG    x11, 72(a0)
+        SREG    x12, 80(a0)
+        SREG    x13, 88(a0)
+        SREG    x14, 96(a0)
+        SREG    x15, 104(a0)
+        SREG    x16, 112(a0)
+        SREG    x17, 120(a0)
+        SREG    x18, 128(a0)
+        SREG    x19, 136(a0)
+        SREG    x20, 144(a0)
+        SREG    x21, 152(a0)
+        SREG    x22, 160(a0)
+        SREG    x23, 168(a0)
+        SREG    x24, 176(a0)
+        SREG    x25, 184(a0)
+        SREG    x26, 192(a0)
+        SREG    x27, 200(a0)
+        SREG    x28, 208(a0)
+        SREG    x29, 216(a0)
+        SREG    x30, 224(a0)
+        SREG    x31, 232(a0)
 
         csrr    x1, 1   # fflags