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| author | Tim Newsome <tim@sifive.com> | 2017-09-18 11:31:08 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2017-09-18 11:31:08 -0700 |
| commit | a0259333dcd4bbba2dbfaeb7bfb9145c56cf96ca (patch) | |
| tree | fd3c7d9f2fa855553eaa73125541b2cf935992a7 /debug/programs/entry.S | |
| parent | 910f39c9b46a883d58f0b77ae847c535834a48da (diff) | |
| download | riscv-tests-a0259333dcd4bbba2dbfaeb7bfb9145c56cf96ca.zip riscv-tests-a0259333dcd4bbba2dbfaeb7bfb9145c56cf96ca.tar.gz riscv-tests-a0259333dcd4bbba2dbfaeb7bfb9145c56cf96ca.tar.bz2 | |
Add interrupts to MulticoreRunHaltStepiTest.
Just to hammer on anything at once, and hopefully catch weird
interactions if they exist.
Diffstat (limited to 'debug/programs/entry.S')
| -rwxr-xr-x | debug/programs/entry.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/debug/programs/entry.S b/debug/programs/entry.S index 97b62a3..35c233e 100755 --- a/debug/programs/entry.S +++ b/debug/programs/entry.S @@ -1,6 +1,6 @@ #include "encoding.h" -#define STACK_SIZE (74 * XLEN / 8) +#define STACK_SIZE (90 * XLEN / 8) #if XLEN == 64 # define LREG ld |