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| author | Tim Newsome <tim@sifive.com> | 2016-07-18 09:57:37 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2016-07-19 11:24:25 -0700 |
| commit | f254dce79dc5a278328699d65da2516545f5d31c (patch) | |
| tree | 4548756c01d96cd9a6419b27b62e8a73aea3e452 /debug/Makefile | |
| parent | dc3bfcbc943ea9b3fc50c5737490d51865fbc8ab (diff) | |
| download | riscv-tests-f254dce79dc5a278328699d65da2516545f5d31c.zip riscv-tests-f254dce79dc5a278328699d65da2516545f5d31c.tar.gz riscv-tests-f254dce79dc5a278328699d65da2516545f5d31c.tar.bz2 | |
Add Makefile.
Add --isolate argument which enables the 32- and 64-bit spikes to be
tested simultaneously.
Diffstat (limited to 'debug/Makefile')
| -rw-r--r-- | debug/Makefile | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/debug/Makefile b/debug/Makefile new file mode 100644 index 0000000..a138f25 --- /dev/null +++ b/debug/Makefile @@ -0,0 +1,12 @@ +RISCV_SIM ?= spike + +all: spike32.log spike64.log + +spike32.log: + ./gdbserver.py --isolate --spike32 --cmd $(RISCV_SIM) > $@ 2>&1 + +spike64.log: + ./gdbserver.py --isolate --spike --cmd $(RISCV_SIM) > $@ 2>&1 + +clean: + rm -f *.log |