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author | Andrew Waterman <andrew@sifive.com> | 2017-03-27 14:26:09 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2017-03-27 14:27:08 -0700 |
commit | 1b78e242657f80250292f39e1f41bad2b1ab9d6c (patch) | |
tree | 7c82538e6287459bde7c3f4a70052919cf03cb40 /benchmarks/pmp | |
parent | f9e8b267a273eb704f6def6f0fa04140d0654d18 (diff) | |
download | riscv-tests-1b78e242657f80250292f39e1f41bad2b1ab9d6c.zip riscv-tests-1b78e242657f80250292f39e1f41bad2b1ab9d6c.tar.gz riscv-tests-1b78e242657f80250292f39e1f41bad2b1ab9d6c.tar.bz2 |
Separate page faults from physical memory access exceptions
Diffstat (limited to 'benchmarks/pmp')
-rw-r--r-- | benchmarks/pmp/pmp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/benchmarks/pmp/pmp.c b/benchmarks/pmp/pmp.c index 07eed8b..055ec79 100644 --- a/benchmarks/pmp/pmp.c +++ b/benchmarks/pmp/pmp.c @@ -16,7 +16,7 @@ uintptr_t handle_trap(uintptr_t cause, uintptr_t epc, uintptr_t regs[32]) if (cause == CAUSE_ILLEGAL_INSTRUCTION) exit(0); // no PMP support - if (!trap_expected) + if (!trap_expected || cause != CAUSE_LOAD_ACCESS) exit(1); trap_expected = 0; return epc + insn_len(epc); |