riscv/insns/vclmul_vx.h


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// vclmul.vx vd, vs2, rs1, vm

#include "zvk_ext_macros.h"

require_zvbc;
require(P.VU.vsew == 64);

VI_VX_ULOOP
({
  // Perform a carryless multiplication 64bx64b on each 64b element,
  // return the low 64b of the 128b product.
  //   <https://en.wikipedia.org/wiki/Carry-less_product>
  vd = 0;
  for (std::size_t bit_idx = 0; bit_idx < sew; ++bit_idx) {
    const reg_t mask = ((reg_t) 1) << bit_idx;
    if ((rs1 & mask) != 0) {
        vd ^= vs2 << bit_idx;
    }
  }
})