From ec79312862ebdd597cc0f63e002e14f31c36deb0 Mon Sep 17 00:00:00 2001 From: Prashanth Mundkur Date: Wed, 21 Mar 2018 13:24:51 -0700 Subject: Fix the access exception during page-table walks to match the original access type, as specified in the manual. (#185) --- riscv/mmu.cc | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'riscv/mmu.cc') diff --git a/riscv/mmu.cc b/riscv/mmu.cc index eca8a83..e954e5a 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -182,7 +182,7 @@ reg_t mmu_t::walk(reg_t addr, access_type type, reg_t mode) // check that physical address of PTE is legal auto ppte = sim->addr_to_mem(base + idx * vm.ptesize); if (!ppte) - throw trap_load_access_fault(addr); + goto fail_access; reg_t pte = vm.ptesize == 4 ? *(uint32_t*)ppte : *(uint64_t*)ppte; reg_t ppn = pte >> PTE_PPN_SHIFT; @@ -223,6 +223,14 @@ fail: case STORE: throw trap_store_page_fault(addr); default: abort(); } + +fail_access: + switch (type) { + case FETCH: throw trap_instruction_access_fault(addr); + case LOAD: throw trap_load_access_fault(addr); + case STORE: throw trap_store_access_fault(addr); + default: abort(); + } } void mmu_t::register_memtracer(memtracer_t* t) -- cgit v1.1