From aa1392d063cf52685f33e5c8d2a6b42a04ede948 Mon Sep 17 00:00:00 2001 From: Chih-Min Chao Date: Wed, 26 Feb 2020 21:26:28 -0800 Subject: rvv: vstart must be 0 for reduction instructions Signed-off-by: Chih-Min Chao --- riscv/decode.h | 1 + 1 file changed, 1 insertion(+) diff --git a/riscv/decode.h b/riscv/decode.h index 81ec1ad..0dd6975 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -502,6 +502,7 @@ static inline bool is_overlapped(const int astart, const int asize, require(P.VU.vsew * 2 <= P.VU.ELEN); \ } \ require((insn.rs2() & (P.VU.vlmul - 1)) == 0); \ + require(P.VU.vstart == 0); \ // // vector: loop header and end helper -- cgit v1.1