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This is public so libspike users can precisely configure the device bus
without going through the DTS interface
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Plugins should now implement and register a device_factory_t to
configure how that device should be parsed from a FDT, and an optional
default DTS string.
This drops support for command-line flag-based device configuration
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make_dtb is only called here, this simplifies later work
towards refactoring device DTS node generation
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These are redundant with sim_t::devices
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Define sim_t::INTERLEAVE so that it can be accessed by reference
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std::min takes its arguments by reference, so the arguments need to be
defined. An alternative would have been to force the problematic argument
into being an rvalue (e.g., by adding 0), but this approach seems to me
to be more robust.
This fixes compilation under -O0; see https://github.com/riscv-software-src/riscv-isa-sim/pull/1264#issuecomment-1451114717
@scottj97 I posit that this situation is unusual enough that it shouldn't
motivate us to test -O0 in CI.
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This is a large delta because the old implementation baked in multiple
assumptions about the contiguity of hart IDs.
As a side effect, fix implementation for big-endian hosts.
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This commit started as an attempt to make the PLIC tolerant of
discontiguous hart IDs, but it turns out it was already most of
the way there: PLIC contexts can still be dense even if the hart
IDs are not.
Nevertheless, I wanted to avoid passing the procs vector directly to
the plic_t constructor. In removing it, I realized I could also get
rid of the smode parameter by querying whether each hart has S-mode.
This is also more correct; previously, we were instantiating the PLIC
as though all harts had S-mode, regardless of whether they actually did.
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!dtb_enabled will now result in the following behavior:
* sim_t.dts and sim_t.dtb will be empty
* the dtb_file passed to sim_t will be ignored
* The default bootrom will not be instantiated
* Bus devices normally configured by parsing the dtb will not be added
This includes the CLINT/PLIC/UART
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No reason to check it both in sim_t::sim_t and in processor_t::set_pmp_num.
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The two-thread approach was originally motivated by making Spike look
as similar as possible to other HTIF targets. But we can get the same
semantics without threading by running the simulator inside of the HTIF
host's idle loop instead of performing a context switch.
This was motivated by speeding up the simulator on Mac OS (it's worth
around 20% because using pthread condition variables to force strict
alternation is very slow). But I think it also simplifies the control
flow enough to justify it on that basis, too.
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This reduces boilerplate as we add additional options.
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This reduces dependencies on config.h in sim.h
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* Make the interface to processor_t static
* Move no-commitlog-enabled warning to processor_t
This is in case future user calls processor_t->enable_log_commits()
without going through sim_t.
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Set target endianess in constructors
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code and emits an error message to help avoid unintentionally loading wrong elf.
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the default target endian is always little endian:
- mmu::is_target_big_endian() return false
- sim_t::get_target_endianness() return memif_endianness_little
when RISCV_ENABLE_DUAL_ENDIAN macro is undefined
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The ns16550 is a widely use serial device so we add a simplified
ns16550 device emulation which is good enough for Linux, OpenSBI,
and hypervisors to use as console.
Signed-off-by: Anup Patel <anup@brainfault.org>
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We need an interrupt controller in Spike which will allow us to
emulate more real-world devices such as UART, VirtIO net, VirtIO
block, etc.
The RISC-V PLIC (or SiFive PLIC) is the commonly used interrupt
controller in existing RISC-V platforms so this patch adds PLIC
emulation for Spike.
Signed-off-by: Anup Patel <anup@brainfault.org>
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Now we have hartids, we can remove nprocs so that we have a single
source of truth.
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The only slightly difficult thing here is that hartids will always
be considered "overridden" by the time we get to sim_t::sim_t (either
overridden by a command line argument, or overridden when we set
default hartids just before the constructor). To allow downstream code
to distinguish between "I picked IDs 0, 1, 2, 3 because the user asked
for 4 processors" and "The user explicitly asked for IDs 0, 1, 2, 3",
we have an extra explicit_hartids field.
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This moves another part of the "configuration" out of the generic
sim.cc code.
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This was using the number of CPUs in total, rather than the CPU whose
PMP regions / MMU type it was actually parsing.
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Before, it had another copy, which is a little unnecessary.
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This commit defines a "cfg_t" structure, which currently just holds
the initrd address range. It will be augmented in future commits to
hold other configuration arguments as well.
To represent a configuration argument, we define an arg_t base class.
This holds a current value, together with a flag that tells us whether
the value has been updated from the default. The idea is that in
future we're going to use that flag when reading a DTB file: if an
argument has actually been specified on the command line, we need to
take it into account; if not, we can ignore the default and use the
DTB file's supplied value.
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