Age | Commit message (Collapse) | Author | Files | Lines |
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This is helpful to test OpenOCD behavior when sbbusyerror is set.
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This is helpful to test OpenOCD behavior when sbbusyerror is set.
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This change lets me test OpenOCD's behavior when harts become available.
It only affects how things look to the debugger. Harts that are
"unavailable" still execute code as usual.
Control is implemented through the 2 LSBs of the DMCUSTOM register in
the Debug Module.
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In keeping with the spirit of simif_t.
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The general strategy is to avoid iterating over the ID space.
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Previously FPRs could always be accessed using abstract commands. I need
this to get coverage of some OpenOCD code that I broke. (See
https://github.com/riscv/riscv-openocd/pull/745)
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execute.cc, entropy_source.h and v_ext_macros.h
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Requested by "LfX Security - Non Inclusive Language Alerts"
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* Don't corrupt s0 when abstract CSR write fails.
* Support abstract FPR access then mstatus.FS=0
Discussion on the spec list leans towards this being a requirement.
Certainly users want their debugger to be able to access all registers
regardless of target state.
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* Clean up debug module options.
1. Instead of passing each one a few levels deep, create
debug_module_config_t which contains them all.
2. Rename all those command line options so they start with --dm for
debug module.
3. Add --dm-no-halt-groups to disable halt group support.
* Update changelog.
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This is used to make sure that OpenOCD can work on targets that don't
support abstract access to CSR registers. It replaces a simpler hack,
which caused #266.
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* Implement hasel/hawindow support.
This should allow simultaneous resume and halt to work.
* Fix anyrunning/anyhalted bits.
* Add --without-hasel argument for testing.
* Make halt/resume times more equal.
Switching threads after every instruction executed in debug mode leads
to a lot of extra instructions being executed on the "other" thread when
both are really supposed to halt/resume near-simultaneously. Fixed that
by adding wfi to debug_rom.S, and implementing it to switch to the other
hart as well as check for JTAG input.
When resuming, write the hart ID to the debug ROM so that the DM knows
which hart actually resumed. (Before simultaneous resume it just assumed
the current one.)
Also got rid of resume symbol in debug_rom.S since it had no purpose.
* Preserve Debug ROM entry points.
* Make sure minstret is correct when wfi happens.
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* Update debug_defines from latest spec.
* Implement halt groups.
This lets the debugger halt multiple harts near simultaneously.
* Revert encoding, which I updated accidentally.
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Optionally make spike behave more like real hardware, to automatically
test OpenOCD's handling of such hardware.
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Add support for hartselhi parsing, but other parts of the debug code
still don't support more than 1024 harts.
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Add debug module authentication.
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Off by default, enabled with --debug-auth.
The protocol is very simple (definitely not secure) to allow debuggers
to test their authentication feature. To authenticate a debugger must:
1. Read authdata
2. Write to authdata the value that it just read, plus 1
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This lets the user control whether the system bus access implements bus
mastering.
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Also add an implicit ebreak after the program buffer. This is not part
of the spec, but hopefully it will be.
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bugs.
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Also clean up some vestigial code.
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Now passing MemTest{8,16,32,64}
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I only tested preexec.
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Fails with not supported for 128-bit.
Fails with exception (on rv32) with 64-bit.
Succeeds (on rv32) with 32-bit.
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All the printfs would be pretty annoying if you're actually using this
to debug something.
Also fixed a small jump bug in halt.
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