riscv-isa-sim.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-06-20	sim_t: change plugin_devices to a vec of shared_ptrs	Jerry Zhao	1	-1/+1
2023-06-17	Run 'make check' in CI	Andrew Waterman	1	-0/+1
2023-06-12	ci: CI should check each commit in a PR	Jerry Zhao	1	-0/+2
2023-02-27	Use size_t, rather than int, for hartids	Andrew Waterman	1	-1/+1
2023-01-27	Remove dirty_enabled from cfg_t	Aaron Durbin	1	-1/+0
2023-01-18	Add trigger_count field to cfg_t	Jerry Zhao	1	-1/+2
2023-01-11	Use nproc or hw.ncpu instead of -j4 to build spike.	Tim Newsome	1	-1/+1
2023-01-11	Refactor build-spike out of test-spike.	Tim Newsome	2	-9/+14
2023-01-09	implement get_size() getter for mem_cfg_t object	Parshintsev Anatoly	1	-1/+1
2023-01-09	implement get_base() getter for mem_cfg_t object	Parshintsev Anatoly	1	-1/+1
2023-01-04	Add cfg_t field to enable PTE dirtying	Jerry Zhao	1	-0/+1
2023-01-04	Untabify ci-tests/testlib.c	Jerry Zhao	1	-19/+19
2023-01-03	Add --[no-]misaligned command-line options	Andrew Waterman	1	-0/+1
2022-12-16	Add github actions test that installed headers are usable	Jerry Zhao	2	-0/+58
2022-10-05	Engage non-virtual-dtor warning in CI tests	Andrew Waterman	1	-1/+1
2022-10-04	Expand set of warnings we error on in CI	Andrew Waterman	1	-1/+1
2022-09-23	Actually run a program in CI	Andrew Waterman	3	-0/+51
2022-09-23	In CI, check that help message prints without error	Andrew Waterman	1	-0/+3
2022-09-22	Run CI with -Werror	Andrew Waterman	1	-1/+1
2020-09-22	Add basic continuous-integration flow	Andrew Waterman	1	-0/+11