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AgeCommit message (Expand)AuthorFilesLines
2022-12-20Always compile commit-log utility functionsJerry Zhao1-2/+0
2022-12-20Check commitlog-enable dynamicallly for csr_t::log_special_writeJerry Zhao1-4/+2
2022-12-20Always reset commit logging variablesJerry Zhao1-2/+0
2022-12-20Always perform symbol lookup in debugJerry Zhao2-7/+5
2022-12-20Fix compile error in commit-logging codeJerry Zhao1-3/+3
2022-12-20Merge pull request #1187 from riscv-software-src/sensibleclintAndrew Waterman1-0/+4
2022-12-20Allow reads/writes to reserved CLINT regionsJerry Zhao1-0/+4
2022-12-17Merge pull request #1186 from ssayin/masterAndrew Waterman1-1/+0
2022-12-17arith.h: remove redundant y1 = t; in mulhu(uint64_t, uint64_t)Serdar Sayın1-1/+0
2022-12-16Merge pull request #1184 from riscv-software-src/libriscvAndrew Waterman19-9/+76
2022-12-16Add github actions test that installed headers are usableJerry Zhao2-0/+58
2022-12-16Remove processor.h/sim.h -> config.h dependenciesJerry Zhao2-2/+0
2022-12-16Add missing vector_unit.h to install headers listJerry Zhao1-1/+2
2022-12-16Remove entropy_source.h -> internals.h dependencyJerry Zhao1-1/+0
2022-12-16Add missing abstract_interrupt_controller.h to header listsJerry Zhao1-0/+2
2022-12-16Remove debug_module.h -> mmu.h dependencyJerry Zhao1-1/+2
2022-12-15Use relative include paths to support public usage of these headersJerry Zhao3-3/+3
2022-12-15Don't install instruction decode macrosJerry Zhao1-3/+1
2022-12-15Add config.h includes directly to source files instead of relying on header c...Jerry Zhao10-0/+10
2022-12-15Merge pull request #1183 from riscv-software-src/macosciAndrew Waterman2-1/+13
2022-12-15Add github actions test on macosJerry Zhao2-1/+13
2022-12-15Merge pull request #1182 from riscv-software-src/fix-1180Andrew Waterman1-0/+1
2022-12-15Merge pull request #1181 from riscv-software-src/better-error-messageAndrew Waterman1-1/+6
2022-12-15Fix build broken by #1170 and #1180Andrew Waterman1-0/+1
2022-12-15Merge pull request #1180 from ucb-bar/cleancfgAndrew Waterman15-52/+60
2022-12-15Print better error message when requesting >1024 hartsAndrew Waterman1-1/+6
2022-12-15Rename memif_endianness_t to endianness_tJerry Zhao12-30/+30
2022-12-15Pull memif_endianness_t into cfg.hJerry Zhao4-9/+7
2022-12-15Add cfg.cc to hold internal implementation of mem_cfg_tJerry Zhao3-16/+26
2022-12-15Merge pull request #1170 from ucb-bar/decode_macrosAndrew Waterman9-312/+328
2022-12-15Split decode.h into public decode.h and private decode_macros.hJerry Zhao9-312/+328
2022-12-14Merge pull request #1175 from riscv-software-src/fix-mac-buildAndrew Waterman1-0/+1
2022-12-14Fix build on M1Andrew Waterman1-0/+1
2022-12-13Merge pull request #1169 from ucb-bar/socketifAndrew Waterman7-112/+144
2022-12-13Move boost asio socket interface to socketif_tJerry Zhao7-112/+144
2022-12-13Merge pull request #1173 from ucb-bar/splitvuAndrew Waterman9-207/+245
2022-12-12Make the processor_t interface independent of configure'd variables (#1174)Jerry Zhao3-14/+8
2022-12-12Pull vector unit into separate source/headerJerry Zhao7-205/+243
2022-12-12Pull p/v_ext_macros.h out of decode.hJerry Zhao2-2/+2
2022-12-12Add Emacs lockfiles to .gitignore (#1171)Jerry Zhao1-0/+1
2022-12-12Merge pull request #1160 from YenHaoChen/pr-textraAndrew Waterman6-18/+191
2022-12-10Move mhselect_compare into mhselect_interpretationScott Johnson2-5/+5
2022-12-10Use interpret_mhselect() to decide textra compare modeScott Johnson2-17/+2
2022-12-10Interpret mhselect in centralized placeScott Johnson2-12/+28
2022-12-10triggers: add mcontext and hcontext CSRsYenHaoChen3-7/+15
2022-12-10triggers: add scontext CSRYenHaoChen3-2/+13
2022-12-10triggers: checking textra (tdata3); checking ASID and VMIDYenHaoChen2-2/+57
2022-12-09triggers: implement tdata3 CSR fieldsYenHaoChen3-2/+80
2022-12-09refactor: add tdata3_csr_t; preparation for CSR textraYenHaoChen3-1/+21
2022-12-09refactor: remove proc parameter from functions of module_tYenHaoChen3-15/+15
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