diff options
| -rw-r--r-- | riscv/mmu.cc | 4 | ||||
| -rw-r--r-- | riscv/mmu.h | 7 |
2 files changed, 9 insertions, 2 deletions
diff --git a/riscv/mmu.cc b/riscv/mmu.cc index 8ce7a3a..be24f40 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -61,7 +61,7 @@ reg_t mmu_t::translate(reg_t addr, reg_t len, access_type type, uint32_t xlate_f bool hlvx = xlate_flags & RISCV_XLATE_VIRT_HLVX; reg_t mode = proc->state.prv; if (type != FETCH) { - if (!proc->state.debug_mode && get_field(proc->state.mstatus->read(), MSTATUS_MPRV)) { + if (in_mprv()) { mode = get_field(proc->state.mstatus->read(), MSTATUS_MPP); if (get_field(proc->state.mstatus->read(), MSTATUS_MPV) && mode != PRV_M) virt = true; @@ -307,7 +307,7 @@ tlb_entry_t mmu_t::refill_tlb(reg_t vaddr, reg_t paddr, char* host_addr, access_ tlb_entry_t entry = {host_addr - vaddr, paddr - vaddr}; - if (proc && get_field(proc->state.mstatus->read(), MSTATUS_MPRV)) + if (in_mprv()) return entry; if ((tlb_load_tag[idx] & ~TLB_CHECK_TRIGGERS) != expected_tag) diff --git a/riscv/mmu.h b/riscv/mmu.h index 56789e0..df98fe1 100644 --- a/riscv/mmu.h +++ b/riscv/mmu.h @@ -403,6 +403,13 @@ private: return (uint16_t*)(translate_insn_addr(addr).host_offset + addr); } + inline bool in_mprv() + { + return proc != nullptr + && !proc->state.debug_mode + && get_field(proc->state.mstatus->read(), MSTATUS_MPRV); + } + reg_t pmp_homogeneous(reg_t addr, reg_t len); bool pmp_ok(reg_t addr, reg_t len, access_type type, reg_t mode); |