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-rw-r--r--ci-tests/testlib.c1
-rw-r--r--riscv/cfg.h3
-rw-r--r--riscv/dts.cc3
-rw-r--r--riscv/dts.h1
-rw-r--r--riscv/processor.cc2
-rw-r--r--riscv/sim.cc4
-rw-r--r--spike_main/spike-log-parser.cc1
-rw-r--r--spike_main/spike.cc3
8 files changed, 14 insertions, 4 deletions
diff --git a/ci-tests/testlib.c b/ci-tests/testlib.c
index 2525b18..1fca4fa 100644
--- a/ci-tests/testlib.c
+++ b/ci-tests/testlib.c
@@ -24,6 +24,7 @@ int main()
false,
endianness_little,
16,
+ (1 << PMP_SHIFT),
mem_cfg,
hartids,
false,
diff --git a/riscv/cfg.h b/riscv/cfg.h
index 8ead618..422c1ae 100644
--- a/riscv/cfg.h
+++ b/riscv/cfg.h
@@ -68,6 +68,7 @@ public:
const bool default_misaligned,
const endianness_t default_endianness,
const reg_t default_pmpregions,
+ const reg_t default_pmpgranularity,
const std::vector<mem_cfg_t> &default_mem_layout,
const std::vector<size_t> default_hartids,
bool default_real_time_clint,
@@ -80,6 +81,7 @@ public:
misaligned(default_misaligned),
endianness(default_endianness),
pmpregions(default_pmpregions),
+ pmpgranularity(default_pmpgranularity),
mem_layout(default_mem_layout),
hartids(default_hartids),
explicit_hartids(false),
@@ -95,6 +97,7 @@ public:
bool misaligned;
endianness_t endianness;
reg_t pmpregions;
+ reg_t pmpgranularity;
cfg_arg_t<std::vector<mem_cfg_t>> mem_layout;
std::optional<reg_t> start_pc;
cfg_arg_t<std::vector<size_t>> hartids;
diff --git a/riscv/dts.cc b/riscv/dts.cc
index 9f73bac..8304171 100644
--- a/riscv/dts.cc
+++ b/riscv/dts.cc
@@ -16,6 +16,7 @@ std::string make_dts(size_t insns_per_rtc_tick, size_t cpu_hz,
reg_t initrd_start, reg_t initrd_end,
const char* bootargs,
size_t pmpregions,
+ size_t pmpgranularity,
std::vector<processor_t*> procs,
std::vector<std::pair<reg_t, abstract_mem_t*>> mems,
std::string device_nodes)
@@ -62,7 +63,7 @@ std::string make_dts(size_t insns_per_rtc_tick, size_t cpu_hz,
" riscv,isa = \"" << procs[i]->get_isa().get_isa_string() << "\";\n"
" mmu-type = \"riscv," << (procs[i]->get_isa().get_max_xlen() <= 32 ? "sv32" : "sv57") << "\";\n"
" riscv,pmpregions = <" << pmpregions << ">;\n"
- " riscv,pmpgranularity = <" << (1 << PMP_SHIFT) << ">;\n"
+ " riscv,pmpgranularity = <" << pmpgranularity << ">;\n"
" clock-frequency = <" << cpu_hz << ">;\n"
" CPU" << i << "_intc: interrupt-controller {\n"
" #address-cells = <2>;\n"
diff --git a/riscv/dts.h b/riscv/dts.h
index 9240124..7afe376 100644
--- a/riscv/dts.h
+++ b/riscv/dts.h
@@ -10,6 +10,7 @@ std::string make_dts(size_t insns_per_rtc_tick, size_t cpu_hz,
reg_t initrd_start, reg_t initrd_end,
const char* bootargs,
size_t pmpregions,
+ size_t pmpgranularity,
std::vector<processor_t*> procs,
std::vector<std::pair<reg_t, abstract_mem_t*>> mems,
std::string device_nodes);
diff --git a/riscv/processor.cc b/riscv/processor.cc
index 22e6542..0ac6e67 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -63,7 +63,7 @@ processor_t::processor_t(const isa_parser_t *isa, const cfg_t *cfg,
for (auto e : isa->get_extensions())
register_extension(find_extension(e.c_str())());
- set_pmp_granularity(1 << PMP_SHIFT);
+ set_pmp_granularity(cfg->pmpgranularity);
set_pmp_num(cfg->pmpregions);
if (isa->get_max_xlen() == 32)
diff --git a/riscv/sim.cc b/riscv/sim.cc
index fc75a37..d75de46 100644
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -140,8 +140,8 @@ sim_t::sim_t(const cfg_t *cfg, bool halted,
device_nodes.append(factory->generate_dts(this));
dts = make_dts(INSNS_PER_RTC_TICK, CPU_HZ,
initrd_bounds.first, initrd_bounds.second,
- cfg->bootargs(), cfg->pmpregions, procs, mems,
- device_nodes);
+ cfg->bootargs(), cfg->pmpregions, cfg->pmpgranularity,
+ procs, mems, device_nodes);
dtb = dts_compile(dts);
}
diff --git a/spike_main/spike-log-parser.cc b/spike_main/spike-log-parser.cc
index 9bea5c5..6ac4ab0 100644
--- a/spike_main/spike-log-parser.cc
+++ b/spike_main/spike-log-parser.cc
@@ -36,6 +36,7 @@ int main(int UNUSED argc, char** argv)
/*default_misaligned=*/false,
/*default_endianness*/endianness_little,
/*default_pmpregions=*/16,
+ /*default_pmpgranularity=*/(1 << PMP_SHIFT),
/*default_mem_layout=*/std::vector<mem_cfg_t>(),
/*default_hartids=*/std::vector<size_t>(),
/*default_real_time_clint=*/false,
diff --git a/spike_main/spike.cc b/spike_main/spike.cc
index 7b28e25..8fd9104 100644
--- a/spike_main/spike.cc
+++ b/spike_main/spike.cc
@@ -41,6 +41,7 @@ static void help(int exit_code = 1)
fprintf(stderr, " --debug-cmd=<name> Read commands from file (use with -d)\n");
fprintf(stderr, " --isa=<name> RISC-V ISA string [default %s]\n", DEFAULT_ISA);
fprintf(stderr, " --pmpregions=<n> Number of PMP regions [default 16]\n");
+ fprintf(stderr, " --pmpgranularity=<n> PMP Granularity in bytes [default 4]\n");
fprintf(stderr, " --priv=<m|mu|msu> RISC-V privilege modes supported [default %s]\n", DEFAULT_PRIV);
fprintf(stderr, " --varch=<name> RISC-V Vector uArch string [default %s]\n", DEFAULT_VARCH);
fprintf(stderr, " --pc=<address> Override ELF entry point\n");
@@ -366,6 +367,7 @@ int main(int argc, char** argv)
/*default_misaligned=*/false,
/*default_endianness*/endianness_little,
/*default_pmpregions=*/16,
+ /*default_pmpgranularity=*/(1 << PMP_SHIFT),
/*default_mem_layout=*/parse_mem_layout("2048"),
/*default_hartids=*/std::vector<size_t>(),
/*default_real_time_clint=*/false,
@@ -406,6 +408,7 @@ int main(int argc, char** argv)
parser.option(0, "log-cache-miss", 0, [&](const char UNUSED *s){log_cache = true;});
parser.option(0, "isa", 1, [&](const char* s){cfg.isa = s;});
parser.option(0, "pmpregions", 1, [&](const char* s){cfg.pmpregions = atoul_safe(s);});
+ parser.option(0, "pmpgranularity", 1, [&](const char* s){cfg.pmpgranularity = atoul_safe(s);});
parser.option(0, "priv", 1, [&](const char* s){cfg.priv = s;});
parser.option(0, "varch", 1, [&](const char* s){cfg.varch = s;});
parser.option(0, "device", 1, device_parser);