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| author | 4vtomat <brandon.wu@sifive.com> | 2022-04-09 03:04:04 -0700 |
|---|---|---|
| committer | 4vtomat <brandon.wu@sifive.com> | 2022-04-09 03:04:04 -0700 |
| commit | 4e816c5ed8e0a1b0ccb89a78ea020bb147096a5f (patch) | |
| tree | e4630bd6f7056be5331cd1332c0e9494938510fa /spike_main | |
| parent | 20cd1dfe3108854a94a12f1367cedbbd71622791 (diff) | |
| download | riscv-isa-sim-4e816c5ed8e0a1b0ccb89a78ea020bb147096a5f.zip riscv-isa-sim-4e816c5ed8e0a1b0ccb89a78ea020bb147096a5f.tar.gz riscv-isa-sim-4e816c5ed8e0a1b0ccb89a78ea020bb147096a5f.tar.bz2 | |
Replaced vector loop compare body with newly defined macro
This commit uses new macro to replace loop compare body to
enhance code reuse.
Diffstat (limited to 'spike_main')
0 files changed, 0 insertions, 0 deletions