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| author | Andrew Waterman <andrew@sifive.com> | 2023-01-31 09:32:42 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2023-01-31 09:32:42 -0800 |
| commit | ba1e1b62860f58686d0e752b5f6a4079e1d1c22b (patch) | |
| tree | 3556f2fa1d446d31293f26a10b4fb8ceb5e00ec5 /riscv/isa_parser.h | |
| parent | 06ab1fe13a8e3f8a6cc9fe219646d9d004f1b680 (diff) | |
| download | riscv-isa-sim-ba1e1b62860f58686d0e752b5f6a4079e1d1c22b.zip riscv-isa-sim-ba1e1b62860f58686d0e752b5f6a4079e1d1c22b.tar.gz riscv-isa-sim-ba1e1b62860f58686d0e752b5f6a4079e1d1c22b.tar.bz2 | |
Update encoding.h for Zicond opcodes
Note this encoding.h's history is unusual because riscv-opcodes master
is currently incompatible with Spike. See the PR that contains its
commit hash (https://github.com/riscv/riscv-opcodes/pull/157) and
discussion at https://github.com/riscv-software-src/riscv-isa-sim/pull/1234#discussion_r1092243338
Diffstat (limited to 'riscv/isa_parser.h')
0 files changed, 0 insertions, 0 deletions