Spike support for the Zalasr extension

8 files changed, 18 insertions, 0 deletions

diff --git a/riscv/insns/lb_aq.h b/riscv/insns/lb_aq.h
new file mode 100644
index 0000000..84423de
--- /dev/null
+++ b/riscv/insns/lb_aq.h
@@ -0,0 +1,2 @@
+require_extension(EXT_ZALASR);
+WRITE_RD(MMU.load<int8_t>(RS1));
diff --git a/riscv/insns/ld_aq.h b/riscv/insns/ld_aq.h
new file mode 100644
index 0000000..3c5bae6
--- /dev/null
+++ b/riscv/insns/ld_aq.h
@@ -0,0 +1,3 @@
+require_rv64;
+require_extension(EXT_ZALASR);
+WRITE_RD(MMU.load<int64_t>(RS1));
diff --git a/riscv/insns/lh_aq.h b/riscv/insns/lh_aq.h
new file mode 100644
index 0000000..e018503
--- /dev/null
+++ b/riscv/insns/lh_aq.h
@@ -0,0 +1,2 @@
+require_extension(EXT_ZALASR);
+WRITE_RD(MMU.load<int16_t>(RS1));
diff --git a/riscv/insns/lw_aq.h b/riscv/insns/lw_aq.h
new file mode 100644
index 0000000..88917b5
--- /dev/null
+++ b/riscv/insns/lw_aq.h
@@ -0,0 +1,2 @@
+require_extension(EXT_ZALASR);
+WRITE_RD(MMU.load<int32_t>(RS1));
diff --git a/riscv/insns/sb_rl.h b/riscv/insns/sb_rl.h
new file mode 100644
index 0000000..91d4d25
--- /dev/null
+++ b/riscv/insns/sb_rl.h
@@ -0,0 +1,2 @@
+require_extension(EXT_ZALASR);
+MMU.store<uint8_t>(RS1, RS2);
diff --git a/riscv/insns/sd_rl.h b/riscv/insns/sd_rl.h
new file mode 100644
index 0000000..980844c
--- /dev/null
+++ b/riscv/insns/sd_rl.h
@@ -0,0 +1,3 @@
+require_rv64;
+require_extension(EXT_ZALASR);
+MMU.store<uint64_t>(RS1, RS2);
diff --git a/riscv/insns/sh_rl.h b/riscv/insns/sh_rl.h
new file mode 100644
index 0000000..bd81cf1
--- /dev/null
+++ b/riscv/insns/sh_rl.h
@@ -0,0 +1,2 @@
+require_extension(EXT_ZALASR);
+MMU.store<uint16_t>(RS1, RS2);
diff --git a/riscv/insns/sw_rl.h b/riscv/insns/sw_rl.h
new file mode 100644
index 0000000..e97f626
--- /dev/null
+++ b/riscv/insns/sw_rl.h
@@ -0,0 +1,2 @@
+require_extension(EXT_ZALASR);
+MMU.store<uint32_t>(RS1, RS2);