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author | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-10-02 12:23:24 -0700 |
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committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-10-02 12:23:24 -0700 |
commit | 3fddbcc0a5b2fc6a446967405e58a92be5db9f5f (patch) | |
tree | 21322a05304b4639ad3312fe3cc2a495b9bda342 /riscv/insns/c_srli.h | |
parent | 82372d00398ce3712f0c7e9f243f6828041e0859 (diff) | |
download | riscv-isa-sim-3fddbcc0a5b2fc6a446967405e58a92be5db9f5f.zip riscv-isa-sim-3fddbcc0a5b2fc6a446967405e58a92be5db9f5f.tar.gz riscv-isa-sim-3fddbcc0a5b2fc6a446967405e58a92be5db9f5f.tar.bz2 |
work towards rvc 1.8
Diffstat (limited to 'riscv/insns/c_srli.h')
-rw-r--r-- | riscv/insns/c_srli.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/riscv/insns/c_srli.h b/riscv/insns/c_srli.h new file mode 100644 index 0000000..f410fef --- /dev/null +++ b/riscv/insns/c_srli.h @@ -0,0 +1,3 @@ +require_extension('C'); +require(insn.rvc_zimm() < xlen); +WRITE_RVC_RS1S(sext_xlen(zext_xlen(RVC_RS1S) >> insn.rvc_zimm())); |