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| author | Tim Newsome <tim@sifive.com> | 2019-04-02 11:05:19 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-04-02 11:05:19 -0700 |
| commit | 3e79495c38bf58df9c7b389205032b2eb3f45fb7 (patch) | |
| tree | 4f14f114747d367e7d34e8edadd2f3597cae07a5 /debug_rom | |
| parent | 994c07cb23dfd9f85d5e6d92aeeaece58bbb4183 (diff) | |
| download | riscv-isa-sim-3e79495c38bf58df9c7b389205032b2eb3f45fb7.zip riscv-isa-sim-3e79495c38bf58df9c7b389205032b2eb3f45fb7.tar.gz riscv-isa-sim-3e79495c38bf58df9c7b389205032b2eb3f45fb7.tar.bz2 | |
Implement debug hasel support (#287)
* Implement hasel/hawindow support.
This should allow simultaneous resume and halt to work.
* Fix anyrunning/anyhalted bits.
* Add --without-hasel argument for testing.
* Make halt/resume times more equal.
Switching threads after every instruction executed in debug mode leads
to a lot of extra instructions being executed on the "other" thread when
both are really supposed to halt/resume near-simultaneously. Fixed that
by adding wfi to debug_rom.S, and implementing it to switch to the other
hart as well as check for JTAG input.
When resuming, write the hart ID to the debug ROM so that the DM knows
which hart actually resumed. (Before simultaneous resume it just assumed
the current one.)
Also got rid of resume symbol in debug_rom.S since it had no purpose.
* Preserve Debug ROM entry points.
* Make sure minstret is correct when wfi happens.
Diffstat (limited to 'debug_rom')
| -rwxr-xr-x | debug_rom/debug_rom.S | 7 | ||||
| -rw-r--r-- | debug_rom/debug_rom.h | 17 |
2 files changed, 14 insertions, 10 deletions
diff --git a/debug_rom/debug_rom.S b/debug_rom/debug_rom.S index 28c7076..03df533 100755 --- a/debug_rom/debug_rom.S +++ b/debug_rom/debug_rom.S @@ -14,6 +14,7 @@ entry: jal zero, _entry resume: + // Not used. jal zero, _resume exception: jal zero, _exception @@ -37,7 +38,8 @@ entry_loop: csrr s0, CSR_MHARTID lbu s0, DEBUG_ROM_FLAGS(s0) // multiple harts can resume here andi s0, s0, (1 << DEBUG_ROM_FLAG_RESUME) - bnez s0, resume + bnez s0, _resume + wfi jal zero, entry_loop _exception: @@ -45,8 +47,9 @@ _exception: ebreak going: + csrr s0, CSR_MHARTID + sw s0, DEBUG_ROM_GOING(zero) // When debug module sees this write, the GO flag is reset. csrr s0, CSR_DSCRATCH // Restore s0 here - sw zero, DEBUG_ROM_GOING(zero) // When debug module sees this write, the GO flag is reset. fence fence.i jalr zero, zero, %lo(whereto) // Debug module will put different instructions and data in the RAM, diff --git a/debug_rom/debug_rom.h b/debug_rom/debug_rom.h index d21e166..3fa018a 100644 --- a/debug_rom/debug_rom.h +++ b/debug_rom/debug_rom.h @@ -1,12 +1,13 @@ static const unsigned char debug_rom_raw[] = { - 0x6f, 0x00, 0xc0, 0x00, 0x6f, 0x00, 0x40, 0x05, 0x6f, 0x00, 0x40, 0x03, + 0x6f, 0x00, 0xc0, 0x00, 0x6f, 0x00, 0xc0, 0x05, 0x6f, 0x00, 0x80, 0x03, 0x0f, 0x00, 0xf0, 0x0f, 0x73, 0x10, 0x24, 0x7b, 0x73, 0x24, 0x40, 0xf1, 0x23, 0x20, 0x80, 0x10, 0x03, 0x44, 0x04, 0x40, 0x13, 0x74, 0x14, 0x00, - 0x63, 0x10, 0x04, 0x02, 0x73, 0x24, 0x40, 0xf1, 0x03, 0x44, 0x04, 0x40, - 0x13, 0x74, 0x24, 0x00, 0xe3, 0x18, 0x04, 0xfc, 0x6f, 0xf0, 0xdf, 0xfd, - 0x23, 0x26, 0x00, 0x10, 0x73, 0x00, 0x10, 0x00, 0x73, 0x24, 0x20, 0x7b, - 0x23, 0x22, 0x00, 0x10, 0x0f, 0x00, 0xf0, 0x0f, 0x0f, 0x10, 0x00, 0x00, - 0x67, 0x00, 0x00, 0x30, 0x73, 0x24, 0x40, 0xf1, 0x23, 0x24, 0x80, 0x10, - 0x73, 0x24, 0x20, 0x7b, 0x73, 0x00, 0x20, 0x7b + 0x63, 0x12, 0x04, 0x02, 0x73, 0x24, 0x40, 0xf1, 0x03, 0x44, 0x04, 0x40, + 0x13, 0x74, 0x24, 0x00, 0x63, 0x16, 0x04, 0x02, 0x73, 0x00, 0x50, 0x10, + 0x6f, 0xf0, 0x9f, 0xfd, 0x23, 0x26, 0x00, 0x10, 0x73, 0x00, 0x10, 0x00, + 0x73, 0x24, 0x40, 0xf1, 0x23, 0x22, 0x80, 0x10, 0x73, 0x24, 0x20, 0x7b, + 0x0f, 0x00, 0xf0, 0x0f, 0x0f, 0x10, 0x00, 0x00, 0x67, 0x00, 0x00, 0x30, + 0x73, 0x24, 0x40, 0xf1, 0x23, 0x24, 0x80, 0x10, 0x73, 0x24, 0x20, 0x7b, + 0x73, 0x00, 0x20, 0x7b }; -static const unsigned int debug_rom_raw_len = 104; +static const unsigned int debug_rom_raw_len = 112; |