diff options
| author | YenHaoChen <howard25336284@gmail.com> | 2024-08-27 09:10:21 +0800 |
|---|---|---|
| committer | YenHaoChen <howard25336284@gmail.com> | 2024-08-27 09:10:21 +0800 |
| commit | d13dc0b3e30ceaa92b0b125bdb2747bcdd020819 (patch) | |
| tree | a981bd9da72d352a854be065b5a46320a87afb42 | |
| parent | 1b80449f017d78d8809a899cc7616d6959bc183e (diff) | |
| download | riscv-isa-sim-d13dc0b3e30ceaa92b0b125bdb2747bcdd020819.zip riscv-isa-sim-d13dc0b3e30ceaa92b0b125bdb2747bcdd020819.tar.gz riscv-isa-sim-d13dc0b3e30ceaa92b0b125bdb2747bcdd020819.tar.bz2 | |
triggers: mcontrol: refactor: Add mcontrol_t::maskmax
| -rw-r--r-- | riscv/triggers.cc | 2 | ||||
| -rw-r--r-- | riscv/triggers.h | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/riscv/triggers.cc b/riscv/triggers.cc index 9eac968..59cad80 100644 --- a/riscv/triggers.cc +++ b/riscv/triggers.cc @@ -146,7 +146,7 @@ reg_t mcontrol_t::tdata1_read(const processor_t * const proc) const noexcept { auto xlen = proc->get_xlen(); v = set_field(v, MCONTROL_TYPE(xlen), CSR_TDATA1_TYPE_MCONTROL); v = set_field(v, CSR_MCONTROL_DMODE(xlen), dmode); - v = set_field(v, MCONTROL_MASKMAX(xlen), 0); + v = set_field(v, MCONTROL_MASKMAX(xlen), maskmax); v = set_field(v, CSR_MCONTROL_HIT, hit); v = set_field(v, MCONTROL_SELECT, select); v = set_field(v, MCONTROL_TIMING, timing); diff --git a/riscv/triggers.h b/riscv/triggers.h index 24f9206..0ff86f0 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -243,6 +243,7 @@ public: private: bool hit = false; + const reg_t maskmax = 0; }; class mcontrol6_t : public mcontrol_common_t { |