aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAndrew Waterman <andrew@sifive.com>2024-08-19 16:50:05 -0500
committerGitHub <noreply@github.com>2024-08-19 16:50:05 -0500
commita8c9d9ccb17e012f4eee5a664ff296d2aaa79d53 (patch)
tree096707f7a2f74210923188283318c3be448705ab
parentf09b02460ee17f8d09c84d2752dc006e32700223 (diff)
parent1a15805b946c2110cda279a4b7d84a382d0065b9 (diff)
downloadriscv-isa-sim-a8c9d9ccb17e012f4eee5a664ff296d2aaa79d53.zip
riscv-isa-sim-a8c9d9ccb17e012f4eee5a664ff296d2aaa79d53.tar.gz
riscv-isa-sim-a8c9d9ccb17e012f4eee5a664ff296d2aaa79d53.tar.bz2
Merge pull request #1771 from rtwfroody/match_mask
Fix mcontrol6 mask low/high operations.
-rw-r--r--riscv/triggers.cc12
1 files changed, 8 insertions, 4 deletions
diff --git a/riscv/triggers.cc b/riscv/triggers.cc
index de3da40..9eac968 100644
--- a/riscv/triggers.cc
+++ b/riscv/triggers.cc
@@ -195,13 +195,17 @@ bool mcontrol_common_t::simple_match(unsigned xlen, reg_t value) const {
return value < tdata2;
case MATCH_MASK_LOW:
{
- reg_t mask = tdata2 >> (xlen/2);
- return (value & mask) == (tdata2 & mask);
+ reg_t tdata2_high = tdata2 >> (xlen/2);
+ reg_t tdata2_low = tdata2 & ((reg_t(1) << (xlen/2)) - 1);
+ reg_t value_low = value & ((reg_t(1) << (xlen/2)) - 1);
+ return (value_low & tdata2_high) == tdata2_low;
}
case MATCH_MASK_HIGH:
{
- reg_t mask = tdata2 >> (xlen/2);
- return ((value >> (xlen/2)) & mask) == (tdata2 & mask);
+ reg_t tdata2_high = tdata2 >> (xlen/2);
+ reg_t tdata2_low = tdata2 & ((reg_t(1) << (xlen/2)) - 1);
+ reg_t value_high = value >> (xlen/2);
+ return (value_high & tdata2_high) == tdata2_low;
}
}
assert(0);