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| author | Andrew Waterman <andrew@sifive.com> | 2022-12-21 01:28:08 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2022-12-21 01:28:08 -0800 |
| commit | d6e5a0ed89f1eb918f7a01e9fc7cdf7e71d6d791 (patch) | |
| tree | cdddb8861e208d3eade8ac33250e8e3168ddc842 | |
| parent | ea70167d2865a049d2cf52cd939d4002b45db309 (diff) | |
| download | riscv-isa-sim-d6e5a0ed89f1eb918f7a01e9fc7cdf7e71d6d791.zip riscv-isa-sim-d6e5a0ed89f1eb918f7a01e9fc7cdf7e71d6d791.tar.gz riscv-isa-sim-d6e5a0ed89f1eb918f7a01e9fc7cdf7e71d6d791.tar.bz2 | |
Speed up histogramming by changing data structure
Since we no longer rely on the map's order, use unordered_map.
| -rw-r--r-- | riscv/processor.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/processor.h b/riscv/processor.h index 75ebd07..8bf2cc7 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -295,7 +295,7 @@ private: std::vector<bool> impl_table; std::vector<insn_desc_t> instructions; - std::map<reg_t,uint64_t> pc_histogram; + std::unordered_map<reg_t,uint64_t> pc_histogram; static const size_t OPCODE_CACHE_SIZE = 8191; insn_desc_t opcode_cache[OPCODE_CACHE_SIZE]; |